forked from luck/tmp_suning_uos_patched
a0ae62806f
This patch adds atomic, cmpxchg, spinlock files. Signed-off-by: Guo Ren <ren_guo@c-sky.com> Cc: Andrea Parri <andrea.parri@amarulasolutions.com> Cc: Arnd Bergmann <arnd@arndb.de> Reviewed-by: Peter Zijlstra <peterz@infradead.org>
88 lines
1.2 KiB
ArmAsm
88 lines
1.2 KiB
ArmAsm
/* SPDX-License-Identifier: GPL-2.0 */
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// Copyright (C) 2018 Hangzhou C-SKY Microsystems co.,ltd.
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#include <linux/linkage.h>
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#include <abi/entry.h>
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.text
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/*
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* int csky_cmpxchg(int oldval, int newval, int *ptr)
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*
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* If *ptr != oldval && return 1,
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* else *ptr = newval return 0.
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*/
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#ifdef CONFIG_CPU_HAS_LDSTEX
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ENTRY(csky_cmpxchg)
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USPTOKSP
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mfcr a3, epc
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INCTRAP a3
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subi sp, 8
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stw a3, (sp, 0)
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mfcr a3, epsr
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stw a3, (sp, 4)
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psrset ee
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1:
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ldex a3, (a2)
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cmpne a0, a3
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bt16 2f
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mov a3, a1
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stex a3, (a2)
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bez a3, 1b
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2:
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sync.is
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mvc a0
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ldw a3, (sp, 0)
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mtcr a3, epc
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ldw a3, (sp, 4)
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mtcr a3, epsr
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addi sp, 8
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KSPTOUSP
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rte
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END(csky_cmpxchg)
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#else
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ENTRY(csky_cmpxchg)
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USPTOKSP
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mfcr a3, epc
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INCTRAP a3
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subi sp, 8
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stw a3, (sp, 0)
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mfcr a3, epsr
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stw a3, (sp, 4)
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psrset ee
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1:
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ldw a3, (a2)
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cmpne a0, a3
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bt16 3f
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2:
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stw a1, (a2)
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3:
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mvc a0
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ldw a3, (sp, 0)
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mtcr a3, epc
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ldw a3, (sp, 4)
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mtcr a3, epsr
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addi sp, 8
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KSPTOUSP
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rte
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END(csky_cmpxchg)
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/*
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* Called from tlbmodified exception
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*/
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ENTRY(csky_cmpxchg_fixup)
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mfcr a0, epc
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lrw a1, 2b
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cmpne a1, a0
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bt 1f
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subi a1, (2b - 1b)
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stw a1, (sp, LSAVE_PC)
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1:
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rts
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END(csky_cmpxchg_fixup)
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#endif
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