forked from luck/tmp_suning_uos_patched
f80dff9da0
get_irqnr_preamble allows machines to take some action before entering the get_irqnr_and_base loop. On iop we enable cp6 access. arch_ret_to_user is added to the userspace return path to allow individual architectures to take actions, like disabling coprocessor access, before the final return to userspace. Per Nicolas Pitre's note, there is no need to cp_wait on the return to user as the latency to return is sufficient. Signed-off-by: Dan Williams <dan.j.williams@intel.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
60 lines
1.3 KiB
ArmAsm
60 lines
1.3 KiB
ArmAsm
/*
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* linux/include/asm-arm/arch-ep93xx/entry-macro.S
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* IRQ demultiplexing for EP93xx
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*
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* Copyright (C) 2006 Lennert Buytenhek <buytenh@wantstofly.org>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or (at
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* your option) any later version.
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*/
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#include <asm/arch/ep93xx-regs.h>
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.macro disable_fiq
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.endm
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.macro get_irqnr_preamble, base, tmp
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.endm
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.macro arch_ret_to_user, tmp1, tmp2
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.endm
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.macro get_irqnr_and_base, irqnr, irqstat, base, tmp
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ldr \base, =(EP93XX_AHB_VIRT_BASE)
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orr \base, \base, #0x000b0000
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mov \irqnr, #0
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ldr \irqstat, [\base] @ lower 32 interrupts
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cmp \irqstat, #0
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bne 1001f
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eor \base, \base, #0x00070000
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ldr \irqstat, [\base] @ upper 32 interrupts
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cmp \irqstat, #0
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beq 1002f
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mov \irqnr, #0x20
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1001:
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movs \tmp, \irqstat, lsl #16
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movne \irqstat, \tmp
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addeq \irqnr, \irqnr, #16
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movs \tmp, \irqstat, lsl #8
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movne \irqstat, \tmp
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addeq \irqnr, \irqnr, #8
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movs \tmp, \irqstat, lsl #4
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movne \irqstat, \tmp
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addeq \irqnr, \irqnr, #4
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movs \tmp, \irqstat, lsl #2
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movne \irqstat, \tmp
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addeq \irqnr, \irqnr, #2
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movs \tmp, \irqstat, lsl #1
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addeq \irqnr, \irqnr, #1
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orrs \base, \base, #1
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1002:
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.endm
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