forked from luck/tmp_suning_uos_patched
d84edddc44
Although the OMAP IOMMU driver supports only ARMv7 (32-bit) platforms,
it can be compile tested for other architectures, including 64-bit ones.
In such case the warning appears:
In file included from drivers/iommu/omap-iommu.c:33:0:
drivers/iommu/omap-iommu.c: In function 'omap_iommu_iova_to_phys':
>> drivers/iommu/omap-iopgtable.h:44:21: warning: large integer implicitly truncated to unsigned type [-Woverflow]
#define IOPTE_MASK (~(IOPTE_SIZE - 1))
^
>> drivers/iommu/omap-iommu.c:1641:41: note: in expansion of macro 'IOPTE_MASK'
ret = omap_iommu_translate(*pte, da, IOPTE_MASK);
^~~~~~~~~~
Fix this by using architecture-depending types in omap_iommu_translate():
1. Pointer should be cast to unsigned long,
2. Virtual addresses should be cast to dma_addr_t.
On 32-bit this will be the same as original code (using u32). On 64-bit
it should produce meaningful result, although it does not really matter.
Reported-by: kbuild test robot <lkp@intel.com>
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Signed-off-by: Joerg Roedel <jroedel@suse.de>
101 lines
2.7 KiB
C
101 lines
2.7 KiB
C
/* SPDX-License-Identifier: GPL-2.0-only */
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/*
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* omap iommu: pagetable definitions
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*
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* Copyright (C) 2008-2010 Nokia Corporation
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*
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* Written by Hiroshi DOYU <Hiroshi.DOYU@nokia.com>
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*/
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#ifndef _OMAP_IOPGTABLE_H
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#define _OMAP_IOPGTABLE_H
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#include <linux/bitops.h>
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/*
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* "L2 table" address mask and size definitions.
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*/
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#define IOPGD_SHIFT 20
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#define IOPGD_SIZE BIT(IOPGD_SHIFT)
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#define IOPGD_MASK (~(IOPGD_SIZE - 1))
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/*
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* "section" address mask and size definitions.
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*/
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#define IOSECTION_SHIFT 20
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#define IOSECTION_SIZE BIT(IOSECTION_SHIFT)
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#define IOSECTION_MASK (~(IOSECTION_SIZE - 1))
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/*
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* "supersection" address mask and size definitions.
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*/
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#define IOSUPER_SHIFT 24
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#define IOSUPER_SIZE BIT(IOSUPER_SHIFT)
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#define IOSUPER_MASK (~(IOSUPER_SIZE - 1))
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#define PTRS_PER_IOPGD (1UL << (32 - IOPGD_SHIFT))
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#define IOPGD_TABLE_SIZE (PTRS_PER_IOPGD * sizeof(u32))
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/*
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* "small page" address mask and size definitions.
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*/
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#define IOPTE_SHIFT 12
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#define IOPTE_SIZE BIT(IOPTE_SHIFT)
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#define IOPTE_MASK (~(IOPTE_SIZE - 1))
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/*
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* "large page" address mask and size definitions.
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*/
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#define IOLARGE_SHIFT 16
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#define IOLARGE_SIZE BIT(IOLARGE_SHIFT)
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#define IOLARGE_MASK (~(IOLARGE_SIZE - 1))
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#define PTRS_PER_IOPTE (1UL << (IOPGD_SHIFT - IOPTE_SHIFT))
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#define IOPTE_TABLE_SIZE (PTRS_PER_IOPTE * sizeof(u32))
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#define IOPAGE_MASK IOPTE_MASK
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/**
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* omap_iommu_translate() - va to pa translation
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* @d: omap iommu descriptor
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* @va: virtual address
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* @mask: omap iommu descriptor mask
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*
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* va to pa translation
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*/
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static inline phys_addr_t omap_iommu_translate(unsigned long d, dma_addr_t va,
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dma_addr_t mask)
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{
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return (d & mask) | (va & (~mask));
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}
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/*
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* some descriptor attributes.
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*/
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#define IOPGD_TABLE (1)
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#define IOPGD_SECTION (2)
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#define IOPGD_SUPER (BIT(18) | IOPGD_SECTION)
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#define iopgd_is_table(x) (((x) & 3) == IOPGD_TABLE)
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#define iopgd_is_section(x) (((x) & (1 << 18 | 3)) == IOPGD_SECTION)
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#define iopgd_is_super(x) (((x) & (1 << 18 | 3)) == IOPGD_SUPER)
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#define IOPTE_SMALL (2)
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#define IOPTE_LARGE (1)
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#define iopte_is_small(x) (((x) & 2) == IOPTE_SMALL)
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#define iopte_is_large(x) (((x) & 3) == IOPTE_LARGE)
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/* to find an entry in a page-table-directory */
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#define iopgd_index(da) (((da) >> IOPGD_SHIFT) & (PTRS_PER_IOPGD - 1))
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#define iopgd_offset(obj, da) ((obj)->iopgd + iopgd_index(da))
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#define iopgd_page_paddr(iopgd) (*iopgd & ~((1 << 10) - 1))
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#define iopgd_page_vaddr(iopgd) ((u32 *)phys_to_virt(iopgd_page_paddr(iopgd)))
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/* to find an entry in the second-level page table. */
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#define iopte_index(da) (((da) >> IOPTE_SHIFT) & (PTRS_PER_IOPTE - 1))
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#define iopte_offset(iopgd, da) (iopgd_page_vaddr(iopgd) + iopte_index(da))
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#endif /* _OMAP_IOPGTABLE_H */
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