forked from luck/tmp_suning_uos_patched
3703f53b99
The ISH transport layer (ishtp) is a bi-directional protocol implemented on the top of PCI based inter processor communication layer. This layer offers: - Connection management - Flow control with the firmware - Multiple client sessions - Client message transfer - Client message reception - DMA for RX and TX for fast data transfer Refer to Documentation/hid/intel-ish-hid.txt for overview of the functionality implemented in this layer. Original-author: Daniel Drubin <daniel.drubin@intel.com> Reviewed-and-tested-by: Ooi, Joyce <joyce.ooi@intel.com> Tested-by: Grant Likely <grant.likely@secretlab.ca> Tested-by: Rann Bar-On <rb6@duke.edu> Tested-by: Atri Bhattacharya <badshah400@aim.com> Signed-off-by: Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com> Signed-off-by: Jiri Kosina <jkosina@suse.cz>
18 lines
594 B
Plaintext
18 lines
594 B
Plaintext
menu "Intel ISH HID support"
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depends on X86_64 && PCI
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config INTEL_ISH_HID
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tristate "Intel Integrated Sensor Hub"
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default n
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select HID
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help
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The Integrated Sensor Hub (ISH) enables the ability to offload
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sensor polling and algorithm processing to a dedicated low power
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processor in the chipset. This allows the core processor to go into
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low power modes more often, resulting in the increased battery life.
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The current processors that support ISH are: Cherrytrail, Skylake,
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Broxton and Kaby Lake.
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Say Y here if you want to support Intel ISH. If unsure, say N.
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endmenu
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