Paul Mundt c66c1d79a9 sh: pci: Set pci_cache_line_size on SH7780 via the PCICLS register. ... The SH7780 PCIC contains a read-only cache line size register that we can derive pci_cache_line_size from. So, make sure that the software idea of the cache line size actually matches the host controller's idea. Signed-off-by: Paul Mundt <lethal@linux-sh.org>		2009-04-17 16:38:00 +09:00
..
boards	sh: pci: Move se7780 INTC fixups out of pci-sh7780.c.	2009-04-17 13:00:18 +09:00
boot	sh: Support fixed 32-bit PMB mappings from bootloader.	2009-03-10 15:49:54 +09:00
cchips	sh: fix the HD64461 level-triggered interrupts handling	2009-03-20 18:57:48 +09:00
configs	sh: update defconfigs.	2009-04-02 22:02:26 +09:00
drivers	sh: pci: Set pci_cache_line_size on SH7780 via the PCICLS register.	2009-04-17 16:38:00 +09:00
include	sh: pci io port base address code	2009-04-16 16:00:14 +09:00
kernel	sh: pci io port base address code	2009-04-16 16:00:14 +09:00
lib	sh: Handle calling csum_partial with misaligned data	2009-01-29 11:56:02 +09:00
lib64	sh: Provide sdivsi3/udivsi3/udivdi3 for sh64, kill off libgcc linking.	2008-12-22 18:44:05 +09:00
math-emu
mm	sh: pci memory range checking code	2009-04-16 16:00:14 +09:00
oprofile	sh: Add support for SH7786 CPU subtype.	2009-03-03 15:40:25 +09:00
tools	sh: add support for SMSC Polaris platform	2009-03-21 01:26:33 +09:00
Kconfig	sh: Plug in support for ARCH=sh64 using sh SRCARCH.	2009-04-11 08:39:27 +09:00
Kconfig.cpu	sh: Support for extended ASIDs on PTEAEX-capable SH-X3 cores.	2009-03-17 17:49:49 +09:00
Kconfig.debug	sh: Conditionalize the code dumper on CONFIG_DUMP_CODE.	2008-12-22 18:44:47 +09:00
Makefile	sh: Generate uImage by default on Urquell board.	2009-03-10 17:00:48 +09:00