Holger Brunck c7f235a7c2 fsl/qe: add bit description for SYNL register for GUMR ... Add the bitmask for the two bit SYNL register according to the QUICK Engine Reference Manual. Signed-off-by: Holger Brunck <holger.brunck@keymile.com> Cc: Zhao Qiang <qiang.zhao@nxp.com> Signed-off-by: David S. Miller <davem@davemloft.net>		2017-05-18 10:28:39 -04:00
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arc	ARCv2: IDU-intc: Use build registers for getting numbers of interrupts	2017-02-06 09:37:57 -08:00
at91	ARM: at91: define LPDDR types	2017-01-16 23:21:29 +01:00
bcm2835	staging: vc04_services: fix up rpi firmware functions	2016-10-16 10:26:12 +02:00
brcmstb
fsl	fsl/qe: add bit description for SYNL register for GUMR	2017-05-18 10:28:39 -04:00
imx	ARM: imx6: fix static declaration in include/soc/imx/cpuidle.h	2016-06-21 14:35:29 +08:00
mediatek
nps	soc: Support for NPS HW scheduling	2016-11-30 11:54:25 -08:00
rockchip	soc: rockchip: add header for ddr rate SIP interface	2016-08-31 18:53:24 +02:00
sa1100
tegra	soc/tegra: Move Tegra flowctrl driver	2017-04-04 15:48:04 +02:00