kernel_optimize_test/arch/arm64
Catalin Marinas d6d66dbd5a arm64: Fix race condition on PG_dcache_clean in __sync_icache_dcache()
commit 588a513d34257fdde95a9f0df0202e31998e85c6 upstream.

To ensure that instructions are observable in a new mapping, the arm64
set_pte_at() implementation cleans the D-cache and invalidates the
I-cache to the PoU. As an optimisation, this is only done on executable
mappings and the PG_dcache_clean page flag is set to avoid future cache
maintenance on the same page.

When two different processes map the same page (e.g. private executable
file or shared mapping) there's a potential race on checking and setting
PG_dcache_clean via set_pte_at() -> __sync_icache_dcache(). While on the
fault paths the page is locked (PG_locked), mprotect() does not take the
page lock. The result is that one process may see the PG_dcache_clean
flag set but the I/D cache maintenance not yet performed.

Avoid test_and_set_bit(PG_dcache_clean) in favour of separate test_bit()
and set_bit(). In the rare event of a race, the cache maintenance is
done twice.

Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
Cc: <stable@vger.kernel.org>
Cc: Will Deacon <will@kernel.org>
Cc: Steven Price <steven.price@arm.com>
Reviewed-by: Steven Price <steven.price@arm.com>
Acked-by: Will Deacon <will@kernel.org>
Link: https://lore.kernel.org/r/20210514095001.13236-1-catalin.marinas@arm.com
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2021-05-19 10:13:11 +02:00
..
boot arm64: dts: uniphier: Change phy-mode to RGMII-ID to enable delay pins for RTL8211E 2021-05-14 09:50:43 +02:00
configs arm64: defconfig: Build in CONFIG_GPIO_MXC by default 2020-10-26 15:48:58 +08:00
crypto crypto: poly1305 - fix poly1305_core_setkey() declaration 2021-05-14 09:50:13 +02:00
include arm64: entry: always set GIC_PRIO_PSR_I_SET during entry 2021-05-19 10:13:07 +02:00
kernel arm64: entry: always set GIC_PRIO_PSR_I_SET during entry 2021-05-19 10:13:07 +02:00
kvm KVM: arm64: Initialize VCPU mdcr_el2 before loading it 2021-05-14 09:50:33 +02:00
lib arm64: Change .weak to SYM_FUNC_START_WEAK_PI for arch/arm64/lib/mem*.S 2020-10-30 08:32:31 +00:00
mm arm64: Fix race condition on PG_dcache_clean in __sync_icache_dcache() 2021-05-19 10:13:11 +02:00
net arm64: bpf: Fix branch offset in JIT 2020-09-17 12:05:36 +01:00
xen
Kbuild
Kconfig arm64: mte: Ensure TIF_MTE_ASYNC_FAULT is set atomically 2021-04-21 13:01:00 +02:00
Kconfig.debug
Kconfig.platforms arm64: berlin: Select DW_APB_TIMER_OF 2020-10-26 10:45:03 +01:00
Makefile arm64: link with -z norelro for LLD or aarch64-elf 2021-01-12 20:18:24 +01:00