forked from luck/tmp_suning_uos_patched
b90da67543
As for cp110, the initial intent when the binding of the ap806 system controller was to have one flat node. The idea being that what is currently a clock-only driver in drivers would become a MFD driver, exposing the clock, GPIO and pinctrl functionality. However, after taking a step back, this would lead to a messy binding. Indeed, a single node would be a GPIO controller, clock controller, pinmux controller, and more. This patch adopts a more classical solution of a top-level syscon node with sub-nodes for the individual devices. The main benefit will be to have each functional block associated to its own sub-node where we can put its own properties. The introduction of the Armada 7K/8K is still in the early stage so the plan is to remove the old binding. However, we don't want to break the device tree compatibility for the few devices already in the field. For this we still keep the support of the legacy compatible string with a big warning in the kernel about updating the device tree. Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com> Signed-off-by: Michael Turquette <mturquette@baylibre.com> Link: lkml.kernel.org/r/cc8c8c40fa4c4e71133033358992ec38e5aa2be5.1496239589.git-series.gregory.clement@free-electrons.com
224 lines
5.3 KiB
C
224 lines
5.3 KiB
C
/*
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* Marvell Armada AP806 System Controller
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*
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* Copyright (C) 2016 Marvell
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*
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* Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
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*
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* This file is licensed under the terms of the GNU General Public
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* License version 2. This program is licensed "as is" without any
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* warranty of any kind, whether express or implied.
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*/
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#define pr_fmt(fmt) "ap806-system-controller: " fmt
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#include <linux/clk-provider.h>
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#include <linux/mfd/syscon.h>
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#include <linux/init.h>
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#include <linux/of.h>
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#include <linux/of_address.h>
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#include <linux/platform_device.h>
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#include <linux/regmap.h>
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#define AP806_SAR_REG 0x400
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#define AP806_SAR_CLKFREQ_MODE_MASK 0x1f
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#define AP806_CLK_NUM 5
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static struct clk *ap806_clks[AP806_CLK_NUM];
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static struct clk_onecell_data ap806_clk_data = {
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.clks = ap806_clks,
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.clk_num = AP806_CLK_NUM,
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};
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static char *ap806_unique_name(struct device *dev, struct device_node *np,
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char *name)
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{
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const __be32 *reg;
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u64 addr;
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reg = of_get_property(np, "reg", NULL);
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addr = of_translate_address(np, reg);
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return devm_kasprintf(dev, GFP_KERNEL, "%llx-%s",
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(unsigned long long)addr, name);
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}
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static int ap806_syscon_common_probe(struct platform_device *pdev,
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struct device_node *syscon_node)
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{
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unsigned int freq_mode, cpuclk_freq;
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const char *name, *fixedclk_name;
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struct device *dev = &pdev->dev;
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struct device_node *np = dev->of_node;
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struct regmap *regmap;
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u32 reg;
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int ret;
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regmap = syscon_node_to_regmap(syscon_node);
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if (IS_ERR(regmap)) {
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dev_err(dev, "cannot get regmap\n");
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return PTR_ERR(regmap);
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}
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ret = regmap_read(regmap, AP806_SAR_REG, ®);
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if (ret) {
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dev_err(dev, "cannot read from regmap\n");
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return ret;
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}
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freq_mode = reg & AP806_SAR_CLKFREQ_MODE_MASK;
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switch (freq_mode) {
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case 0x0:
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case 0x1:
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cpuclk_freq = 2000;
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break;
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case 0x6:
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case 0x7:
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cpuclk_freq = 1800;
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break;
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case 0x4:
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case 0xB:
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case 0xD:
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cpuclk_freq = 1600;
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break;
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case 0x1a:
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cpuclk_freq = 1400;
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break;
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case 0x14:
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case 0x17:
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cpuclk_freq = 1300;
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break;
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case 0x19:
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cpuclk_freq = 1200;
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break;
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case 0x13:
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case 0x1d:
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cpuclk_freq = 1000;
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break;
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case 0x1c:
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cpuclk_freq = 800;
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break;
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case 0x1b:
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cpuclk_freq = 600;
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break;
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default:
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dev_err(dev, "invalid SAR value\n");
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return -EINVAL;
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}
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/* Convert to hertz */
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cpuclk_freq *= 1000 * 1000;
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/* CPU clocks depend on the Sample At Reset configuration */
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name = ap806_unique_name(dev, syscon_node, "cpu-cluster-0");
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ap806_clks[0] = clk_register_fixed_rate(dev, name, NULL,
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0, cpuclk_freq);
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if (IS_ERR(ap806_clks[0])) {
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ret = PTR_ERR(ap806_clks[0]);
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goto fail0;
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}
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name = ap806_unique_name(dev, syscon_node, "cpu-cluster-1");
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ap806_clks[1] = clk_register_fixed_rate(dev, name, NULL, 0,
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cpuclk_freq);
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if (IS_ERR(ap806_clks[1])) {
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ret = PTR_ERR(ap806_clks[1]);
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goto fail1;
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}
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/* Fixed clock is always 1200 Mhz */
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fixedclk_name = ap806_unique_name(dev, syscon_node, "fixed");
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ap806_clks[2] = clk_register_fixed_rate(dev, fixedclk_name, NULL,
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0, 1200 * 1000 * 1000);
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if (IS_ERR(ap806_clks[2])) {
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ret = PTR_ERR(ap806_clks[2]);
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goto fail2;
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}
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/* MSS Clock is fixed clock divided by 6 */
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name = ap806_unique_name(dev, syscon_node, "mss");
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ap806_clks[3] = clk_register_fixed_factor(NULL, name, fixedclk_name,
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0, 1, 6);
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if (IS_ERR(ap806_clks[3])) {
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ret = PTR_ERR(ap806_clks[3]);
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goto fail3;
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}
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/* SDIO(/eMMC) Clock is fixed clock divided by 3 */
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name = ap806_unique_name(dev, syscon_node, "sdio");
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ap806_clks[4] = clk_register_fixed_factor(NULL, name,
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fixedclk_name,
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0, 1, 3);
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if (IS_ERR(ap806_clks[4])) {
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ret = PTR_ERR(ap806_clks[4]);
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goto fail4;
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}
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of_clk_add_provider(np, of_clk_src_onecell_get, &ap806_clk_data);
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ret = of_clk_add_provider(np, of_clk_src_onecell_get, &ap806_clk_data);
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if (ret)
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goto fail_clk_add;
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return 0;
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fail_clk_add:
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clk_unregister_fixed_factor(ap806_clks[4]);
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fail4:
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clk_unregister_fixed_factor(ap806_clks[3]);
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fail3:
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clk_unregister_fixed_rate(ap806_clks[2]);
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fail2:
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clk_unregister_fixed_rate(ap806_clks[1]);
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fail1:
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clk_unregister_fixed_rate(ap806_clks[0]);
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fail0:
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return ret;
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}
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static int ap806_syscon_legacy_probe(struct platform_device *pdev)
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{
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dev_warn(&pdev->dev, FW_WARN "Using legacy device tree binding\n");
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dev_warn(&pdev->dev, FW_WARN "Update your device tree:\n");
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dev_warn(&pdev->dev, FW_WARN
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"This binding won't be supported in future kernel\n");
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return ap806_syscon_common_probe(pdev, pdev->dev.of_node);
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}
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static int ap806_clock_probe(struct platform_device *pdev)
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{
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return ap806_syscon_common_probe(pdev, pdev->dev.of_node->parent);
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}
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static const struct of_device_id ap806_syscon_legacy_of_match[] = {
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{ .compatible = "marvell,ap806-system-controller", },
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{ }
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};
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static struct platform_driver ap806_syscon_legacy_driver = {
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.probe = ap806_syscon_legacy_probe,
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.driver = {
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.name = "marvell-ap806-system-controller",
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.of_match_table = ap806_syscon_legacy_of_match,
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.suppress_bind_attrs = true,
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},
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};
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builtin_platform_driver(ap806_syscon_legacy_driver);
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static const struct of_device_id ap806_clock_of_match[] = {
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{ .compatible = "marvell,ap806-clock", },
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{ }
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};
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static struct platform_driver ap806_clock_driver = {
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.probe = ap806_clock_probe,
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.driver = {
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.name = "marvell-ap806-clock",
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.of_match_table = ap806_clock_of_match,
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.suppress_bind_attrs = true,
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},
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};
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builtin_platform_driver(ap806_clock_driver);
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