Dan Williams caa20d974c async_tx: trim dma_async_tx_descriptor in 'no channel switch' case ... Saves 24 bytes per descriptor (64-bit) when the channel-switching capabilities of async_tx are not required. Signed-off-by: Dan Williams <dan.j.williams@intel.com>		2010-05-17 16:24:16 -07:00
..
async_memcpy.c	dmaengine, async_tx: support alignment checks	2009-09-08 17:42:53 -07:00
async_memset.c	dmaengine, async_tx: support alignment checks	2009-09-08 17:42:53 -07:00
async_pq.c	include cleanup: Update gfp.h and slab.h includes to prepare for breaking implicit slab.h inclusion from percpu.h	2010-03-30 22:02:32 +09:00
async_raid6_recov.c	async_tx: fix asynchronous raid6 recovery for ddf layouts	2009-10-19 23:34:46 -07:00
async_tx.c	async_tx: trim dma_async_tx_descriptor in 'no channel switch' case	2010-05-17 16:24:16 -07:00
async_xor.c	async_tx: build-time toggling of async_{syndrome,xor}_val dma support	2009-11-19 23:21:03 -07:00
Kconfig	async_tx: build-time toggling of async_{syndrome,xor}_val dma support	2009-11-19 23:21:03 -07:00
Makefile	async_tx: raid6 recovery self test	2009-08-29 19:09:28 -07:00
raid6test.c	include cleanup: Update gfp.h and slab.h includes to prepare for breaking implicit slab.h inclusion from percpu.h	2010-03-30 22:02:32 +09:00