forked from luck/tmp_suning_uos_patched
641 lines
16 KiB
C
641 lines
16 KiB
C
#ifndef __KVM_H
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#define __KVM_H
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/*
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* This work is licensed under the terms of the GNU GPL, version 2. See
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* the COPYING file in the top-level directory.
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*/
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#include <linux/types.h>
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#include <linux/list.h>
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#include <linux/mutex.h>
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#include <linux/spinlock.h>
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#include <linux/mm.h>
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#include "vmx.h"
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#include <linux/kvm.h>
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#include <linux/kvm_para.h>
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#define CR0_PE_MASK (1ULL << 0)
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#define CR0_TS_MASK (1ULL << 3)
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#define CR0_NE_MASK (1ULL << 5)
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#define CR0_WP_MASK (1ULL << 16)
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#define CR0_NW_MASK (1ULL << 29)
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#define CR0_CD_MASK (1ULL << 30)
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#define CR0_PG_MASK (1ULL << 31)
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#define CR3_WPT_MASK (1ULL << 3)
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#define CR3_PCD_MASK (1ULL << 4)
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#define CR3_RESEVED_BITS 0x07ULL
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#define CR3_L_MODE_RESEVED_BITS (~((1ULL << 40) - 1) | 0x0fe7ULL)
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#define CR3_FLAGS_MASK ((1ULL << 5) - 1)
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#define CR4_VME_MASK (1ULL << 0)
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#define CR4_PSE_MASK (1ULL << 4)
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#define CR4_PAE_MASK (1ULL << 5)
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#define CR4_PGE_MASK (1ULL << 7)
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#define CR4_VMXE_MASK (1ULL << 13)
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#define KVM_GUEST_CR0_MASK \
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(CR0_PG_MASK | CR0_PE_MASK | CR0_WP_MASK | CR0_NE_MASK \
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| CR0_NW_MASK | CR0_CD_MASK)
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#define KVM_VM_CR0_ALWAYS_ON \
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(CR0_PG_MASK | CR0_PE_MASK | CR0_WP_MASK | CR0_NE_MASK)
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#define KVM_GUEST_CR4_MASK \
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(CR4_PSE_MASK | CR4_PAE_MASK | CR4_PGE_MASK | CR4_VMXE_MASK | CR4_VME_MASK)
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#define KVM_PMODE_VM_CR4_ALWAYS_ON (CR4_VMXE_MASK | CR4_PAE_MASK)
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#define KVM_RMODE_VM_CR4_ALWAYS_ON (CR4_VMXE_MASK | CR4_PAE_MASK | CR4_VME_MASK)
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#define INVALID_PAGE (~(hpa_t)0)
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#define UNMAPPED_GVA (~(gpa_t)0)
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#define KVM_MAX_VCPUS 1
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#define KVM_MEMORY_SLOTS 4
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#define KVM_NUM_MMU_PAGES 256
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#define KVM_MIN_FREE_MMU_PAGES 5
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#define KVM_REFILL_PAGES 25
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#define FX_IMAGE_SIZE 512
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#define FX_IMAGE_ALIGN 16
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#define FX_BUF_SIZE (2 * FX_IMAGE_SIZE + FX_IMAGE_ALIGN)
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#define DE_VECTOR 0
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#define DF_VECTOR 8
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#define TS_VECTOR 10
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#define NP_VECTOR 11
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#define SS_VECTOR 12
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#define GP_VECTOR 13
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#define PF_VECTOR 14
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#define SELECTOR_TI_MASK (1 << 2)
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#define SELECTOR_RPL_MASK 0x03
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#define IOPL_SHIFT 12
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/*
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* Address types:
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*
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* gva - guest virtual address
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* gpa - guest physical address
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* gfn - guest frame number
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* hva - host virtual address
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* hpa - host physical address
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* hfn - host frame number
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*/
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typedef unsigned long gva_t;
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typedef u64 gpa_t;
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typedef unsigned long gfn_t;
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typedef unsigned long hva_t;
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typedef u64 hpa_t;
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typedef unsigned long hfn_t;
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#define NR_PTE_CHAIN_ENTRIES 5
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struct kvm_pte_chain {
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u64 *parent_ptes[NR_PTE_CHAIN_ENTRIES];
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struct hlist_node link;
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};
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/*
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* kvm_mmu_page_role, below, is defined as:
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*
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* bits 0:3 - total guest paging levels (2-4, or zero for real mode)
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* bits 4:7 - page table level for this shadow (1-4)
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* bits 8:9 - page table quadrant for 2-level guests
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* bit 16 - "metaphysical" - gfn is not a real page (huge page/real mode)
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*/
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union kvm_mmu_page_role {
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unsigned word;
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struct {
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unsigned glevels : 4;
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unsigned level : 4;
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unsigned quadrant : 2;
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unsigned pad_for_nice_hex_output : 6;
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unsigned metaphysical : 1;
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};
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};
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struct kvm_mmu_page {
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struct list_head link;
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struct hlist_node hash_link;
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/*
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* The following two entries are used to key the shadow page in the
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* hash table.
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*/
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gfn_t gfn;
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union kvm_mmu_page_role role;
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hpa_t page_hpa;
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unsigned long slot_bitmap; /* One bit set per slot which has memory
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* in this shadow page.
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*/
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int global; /* Set if all ptes in this page are global */
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int multimapped; /* More than one parent_pte? */
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int root_count; /* Currently serving as active root */
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union {
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u64 *parent_pte; /* !multimapped */
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struct hlist_head parent_ptes; /* multimapped, kvm_pte_chain */
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};
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};
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struct vmcs {
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u32 revision_id;
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u32 abort;
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char data[0];
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};
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#define vmx_msr_entry kvm_msr_entry
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struct kvm_vcpu;
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/*
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* x86 supports 3 paging modes (4-level 64-bit, 3-level 64-bit, and 2-level
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* 32-bit). The kvm_mmu structure abstracts the details of the current mmu
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* mode.
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*/
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struct kvm_mmu {
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void (*new_cr3)(struct kvm_vcpu *vcpu);
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int (*page_fault)(struct kvm_vcpu *vcpu, gva_t gva, u32 err);
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void (*free)(struct kvm_vcpu *vcpu);
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gpa_t (*gva_to_gpa)(struct kvm_vcpu *vcpu, gva_t gva);
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hpa_t root_hpa;
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int root_level;
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int shadow_root_level;
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u64 *pae_root;
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};
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#define KVM_NR_MEM_OBJS 20
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struct kvm_mmu_memory_cache {
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int nobjs;
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void *objects[KVM_NR_MEM_OBJS];
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};
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/*
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* We don't want allocation failures within the mmu code, so we preallocate
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* enough memory for a single page fault in a cache.
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*/
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struct kvm_guest_debug {
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int enabled;
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unsigned long bp[4];
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int singlestep;
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};
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enum {
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VCPU_REGS_RAX = 0,
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VCPU_REGS_RCX = 1,
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VCPU_REGS_RDX = 2,
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VCPU_REGS_RBX = 3,
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VCPU_REGS_RSP = 4,
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VCPU_REGS_RBP = 5,
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VCPU_REGS_RSI = 6,
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VCPU_REGS_RDI = 7,
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#ifdef CONFIG_X86_64
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VCPU_REGS_R8 = 8,
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VCPU_REGS_R9 = 9,
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VCPU_REGS_R10 = 10,
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VCPU_REGS_R11 = 11,
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VCPU_REGS_R12 = 12,
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VCPU_REGS_R13 = 13,
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VCPU_REGS_R14 = 14,
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VCPU_REGS_R15 = 15,
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#endif
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NR_VCPU_REGS
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};
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enum {
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VCPU_SREG_CS,
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VCPU_SREG_DS,
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VCPU_SREG_ES,
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VCPU_SREG_FS,
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VCPU_SREG_GS,
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VCPU_SREG_SS,
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VCPU_SREG_TR,
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VCPU_SREG_LDTR,
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};
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struct kvm_vcpu {
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struct kvm *kvm;
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union {
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struct vmcs *vmcs;
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struct vcpu_svm *svm;
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};
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struct mutex mutex;
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int cpu;
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int launched;
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int interrupt_window_open;
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unsigned long irq_summary; /* bit vector: 1 per word in irq_pending */
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#define NR_IRQ_WORDS KVM_IRQ_BITMAP_SIZE(unsigned long)
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unsigned long irq_pending[NR_IRQ_WORDS];
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unsigned long regs[NR_VCPU_REGS]; /* for rsp: vcpu_load_rsp_rip() */
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unsigned long rip; /* needs vcpu_load_rsp_rip() */
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unsigned long cr0;
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unsigned long cr2;
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unsigned long cr3;
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gpa_t para_state_gpa;
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struct page *para_state_page;
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gpa_t hypercall_gpa;
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unsigned long cr4;
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unsigned long cr8;
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u64 pdptrs[4]; /* pae */
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u64 shadow_efer;
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u64 apic_base;
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u64 ia32_misc_enable_msr;
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int nmsrs;
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struct vmx_msr_entry *guest_msrs;
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struct vmx_msr_entry *host_msrs;
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struct list_head free_pages;
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struct kvm_mmu_page page_header_buf[KVM_NUM_MMU_PAGES];
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struct kvm_mmu mmu;
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struct kvm_mmu_memory_cache mmu_pte_chain_cache;
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struct kvm_mmu_memory_cache mmu_rmap_desc_cache;
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gfn_t last_pt_write_gfn;
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int last_pt_write_count;
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struct kvm_guest_debug guest_debug;
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char fx_buf[FX_BUF_SIZE];
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char *host_fx_image;
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char *guest_fx_image;
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int mmio_needed;
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int mmio_read_completed;
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int mmio_is_write;
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int mmio_size;
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unsigned char mmio_data[8];
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gpa_t mmio_phys_addr;
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struct {
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int active;
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u8 save_iopl;
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struct kvm_save_segment {
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u16 selector;
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unsigned long base;
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u32 limit;
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u32 ar;
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} tr, es, ds, fs, gs;
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} rmode;
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};
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struct kvm_memory_slot {
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gfn_t base_gfn;
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unsigned long npages;
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unsigned long flags;
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struct page **phys_mem;
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unsigned long *dirty_bitmap;
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};
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struct kvm {
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spinlock_t lock; /* protects everything except vcpus */
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int nmemslots;
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struct kvm_memory_slot memslots[KVM_MEMORY_SLOTS];
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/*
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* Hash table of struct kvm_mmu_page.
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*/
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struct list_head active_mmu_pages;
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int n_free_mmu_pages;
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struct hlist_head mmu_page_hash[KVM_NUM_MMU_PAGES];
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struct kvm_vcpu vcpus[KVM_MAX_VCPUS];
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int memory_config_version;
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int busy;
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unsigned long rmap_overflow;
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struct list_head vm_list;
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};
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struct kvm_stat {
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u32 pf_fixed;
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u32 pf_guest;
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u32 tlb_flush;
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u32 invlpg;
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u32 exits;
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u32 io_exits;
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u32 mmio_exits;
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u32 signal_exits;
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u32 irq_window_exits;
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u32 halt_exits;
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u32 request_irq_exits;
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u32 irq_exits;
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};
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struct descriptor_table {
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u16 limit;
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unsigned long base;
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} __attribute__((packed));
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struct kvm_arch_ops {
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int (*cpu_has_kvm_support)(void); /* __init */
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int (*disabled_by_bios)(void); /* __init */
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void (*hardware_enable)(void *dummy); /* __init */
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void (*hardware_disable)(void *dummy);
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int (*hardware_setup)(void); /* __init */
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void (*hardware_unsetup)(void); /* __exit */
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int (*vcpu_create)(struct kvm_vcpu *vcpu);
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void (*vcpu_free)(struct kvm_vcpu *vcpu);
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struct kvm_vcpu *(*vcpu_load)(struct kvm_vcpu *vcpu);
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void (*vcpu_put)(struct kvm_vcpu *vcpu);
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void (*vcpu_decache)(struct kvm_vcpu *vcpu);
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int (*set_guest_debug)(struct kvm_vcpu *vcpu,
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struct kvm_debug_guest *dbg);
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int (*get_msr)(struct kvm_vcpu *vcpu, u32 msr_index, u64 *pdata);
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int (*set_msr)(struct kvm_vcpu *vcpu, u32 msr_index, u64 data);
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u64 (*get_segment_base)(struct kvm_vcpu *vcpu, int seg);
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void (*get_segment)(struct kvm_vcpu *vcpu,
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struct kvm_segment *var, int seg);
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void (*set_segment)(struct kvm_vcpu *vcpu,
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struct kvm_segment *var, int seg);
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void (*get_cs_db_l_bits)(struct kvm_vcpu *vcpu, int *db, int *l);
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void (*decache_cr0_cr4_guest_bits)(struct kvm_vcpu *vcpu);
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void (*set_cr0)(struct kvm_vcpu *vcpu, unsigned long cr0);
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void (*set_cr0_no_modeswitch)(struct kvm_vcpu *vcpu,
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unsigned long cr0);
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void (*set_cr3)(struct kvm_vcpu *vcpu, unsigned long cr3);
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void (*set_cr4)(struct kvm_vcpu *vcpu, unsigned long cr4);
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void (*set_efer)(struct kvm_vcpu *vcpu, u64 efer);
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void (*get_idt)(struct kvm_vcpu *vcpu, struct descriptor_table *dt);
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void (*set_idt)(struct kvm_vcpu *vcpu, struct descriptor_table *dt);
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void (*get_gdt)(struct kvm_vcpu *vcpu, struct descriptor_table *dt);
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void (*set_gdt)(struct kvm_vcpu *vcpu, struct descriptor_table *dt);
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unsigned long (*get_dr)(struct kvm_vcpu *vcpu, int dr);
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void (*set_dr)(struct kvm_vcpu *vcpu, int dr, unsigned long value,
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int *exception);
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void (*cache_regs)(struct kvm_vcpu *vcpu);
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void (*decache_regs)(struct kvm_vcpu *vcpu);
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unsigned long (*get_rflags)(struct kvm_vcpu *vcpu);
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void (*set_rflags)(struct kvm_vcpu *vcpu, unsigned long rflags);
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void (*invlpg)(struct kvm_vcpu *vcpu, gva_t addr);
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void (*tlb_flush)(struct kvm_vcpu *vcpu);
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void (*inject_page_fault)(struct kvm_vcpu *vcpu,
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unsigned long addr, u32 err_code);
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void (*inject_gp)(struct kvm_vcpu *vcpu, unsigned err_code);
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int (*run)(struct kvm_vcpu *vcpu, struct kvm_run *run);
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int (*vcpu_setup)(struct kvm_vcpu *vcpu);
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void (*skip_emulated_instruction)(struct kvm_vcpu *vcpu);
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void (*patch_hypercall)(struct kvm_vcpu *vcpu,
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unsigned char *hypercall_addr);
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};
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extern struct kvm_stat kvm_stat;
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extern struct kvm_arch_ops *kvm_arch_ops;
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#define kvm_printf(kvm, fmt ...) printk(KERN_DEBUG fmt)
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#define vcpu_printf(vcpu, fmt...) kvm_printf(vcpu->kvm, fmt)
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int kvm_init_arch(struct kvm_arch_ops *ops, struct module *module);
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void kvm_exit_arch(void);
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void kvm_mmu_destroy(struct kvm_vcpu *vcpu);
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int kvm_mmu_create(struct kvm_vcpu *vcpu);
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int kvm_mmu_setup(struct kvm_vcpu *vcpu);
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int kvm_mmu_reset_context(struct kvm_vcpu *vcpu);
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void kvm_mmu_slot_remove_write_access(struct kvm_vcpu *vcpu, int slot);
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hpa_t gpa_to_hpa(struct kvm_vcpu *vcpu, gpa_t gpa);
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#define HPA_MSB ((sizeof(hpa_t) * 8) - 1)
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#define HPA_ERR_MASK ((hpa_t)1 << HPA_MSB)
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static inline int is_error_hpa(hpa_t hpa) { return hpa >> HPA_MSB; }
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hpa_t gva_to_hpa(struct kvm_vcpu *vcpu, gva_t gva);
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void kvm_emulator_want_group7_invlpg(void);
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extern hpa_t bad_page_address;
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static inline struct page *gfn_to_page(struct kvm_memory_slot *slot, gfn_t gfn)
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{
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return slot->phys_mem[gfn - slot->base_gfn];
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}
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struct kvm_memory_slot *gfn_to_memslot(struct kvm *kvm, gfn_t gfn);
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void mark_page_dirty(struct kvm *kvm, gfn_t gfn);
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enum emulation_result {
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EMULATE_DONE, /* no further processing */
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EMULATE_DO_MMIO, /* kvm_run filled with mmio request */
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EMULATE_FAIL, /* can't emulate this instruction */
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};
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int emulate_instruction(struct kvm_vcpu *vcpu, struct kvm_run *run,
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unsigned long cr2, u16 error_code);
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void realmode_lgdt(struct kvm_vcpu *vcpu, u16 size, unsigned long address);
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void realmode_lidt(struct kvm_vcpu *vcpu, u16 size, unsigned long address);
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void realmode_lmsw(struct kvm_vcpu *vcpu, unsigned long msw,
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unsigned long *rflags);
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unsigned long realmode_get_cr(struct kvm_vcpu *vcpu, int cr);
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void realmode_set_cr(struct kvm_vcpu *vcpu, int cr, unsigned long value,
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unsigned long *rflags);
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struct x86_emulate_ctxt;
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int emulate_invlpg(struct kvm_vcpu *vcpu, gva_t address);
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int emulate_clts(struct kvm_vcpu *vcpu);
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int emulator_get_dr(struct x86_emulate_ctxt* ctxt, int dr,
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unsigned long *dest);
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int emulator_set_dr(struct x86_emulate_ctxt *ctxt, int dr,
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unsigned long value);
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void set_cr0(struct kvm_vcpu *vcpu, unsigned long cr0);
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void set_cr3(struct kvm_vcpu *vcpu, unsigned long cr0);
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void set_cr4(struct kvm_vcpu *vcpu, unsigned long cr0);
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void set_cr8(struct kvm_vcpu *vcpu, unsigned long cr0);
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void lmsw(struct kvm_vcpu *vcpu, unsigned long msw);
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int kvm_get_msr_common(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata);
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int kvm_set_msr_common(struct kvm_vcpu *vcpu, u32 msr, u64 data);
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|
void fx_init(struct kvm_vcpu *vcpu);
|
|
|
|
void load_msrs(struct vmx_msr_entry *e, int n);
|
|
void save_msrs(struct vmx_msr_entry *e, int n);
|
|
void kvm_resched(struct kvm_vcpu *vcpu);
|
|
|
|
int kvm_read_guest(struct kvm_vcpu *vcpu,
|
|
gva_t addr,
|
|
unsigned long size,
|
|
void *dest);
|
|
|
|
int kvm_write_guest(struct kvm_vcpu *vcpu,
|
|
gva_t addr,
|
|
unsigned long size,
|
|
void *data);
|
|
|
|
unsigned long segment_base(u16 selector);
|
|
|
|
void kvm_mmu_pre_write(struct kvm_vcpu *vcpu, gpa_t gpa, int bytes);
|
|
void kvm_mmu_post_write(struct kvm_vcpu *vcpu, gpa_t gpa, int bytes);
|
|
int kvm_mmu_unprotect_page_virt(struct kvm_vcpu *vcpu, gva_t gva);
|
|
void kvm_mmu_free_some_pages(struct kvm_vcpu *vcpu);
|
|
|
|
int kvm_hypercall(struct kvm_vcpu *vcpu, struct kvm_run *run);
|
|
|
|
static inline int kvm_mmu_page_fault(struct kvm_vcpu *vcpu, gva_t gva,
|
|
u32 error_code)
|
|
{
|
|
if (unlikely(vcpu->kvm->n_free_mmu_pages < KVM_MIN_FREE_MMU_PAGES))
|
|
kvm_mmu_free_some_pages(vcpu);
|
|
return vcpu->mmu.page_fault(vcpu, gva, error_code);
|
|
}
|
|
|
|
static inline struct page *_gfn_to_page(struct kvm *kvm, gfn_t gfn)
|
|
{
|
|
struct kvm_memory_slot *slot = gfn_to_memslot(kvm, gfn);
|
|
return (slot) ? slot->phys_mem[gfn - slot->base_gfn] : NULL;
|
|
}
|
|
|
|
static inline int is_long_mode(struct kvm_vcpu *vcpu)
|
|
{
|
|
#ifdef CONFIG_X86_64
|
|
return vcpu->shadow_efer & EFER_LME;
|
|
#else
|
|
return 0;
|
|
#endif
|
|
}
|
|
|
|
static inline int is_pae(struct kvm_vcpu *vcpu)
|
|
{
|
|
return vcpu->cr4 & CR4_PAE_MASK;
|
|
}
|
|
|
|
static inline int is_pse(struct kvm_vcpu *vcpu)
|
|
{
|
|
return vcpu->cr4 & CR4_PSE_MASK;
|
|
}
|
|
|
|
static inline int is_paging(struct kvm_vcpu *vcpu)
|
|
{
|
|
return vcpu->cr0 & CR0_PG_MASK;
|
|
}
|
|
|
|
static inline int memslot_id(struct kvm *kvm, struct kvm_memory_slot *slot)
|
|
{
|
|
return slot - kvm->memslots;
|
|
}
|
|
|
|
static inline struct kvm_mmu_page *page_header(hpa_t shadow_page)
|
|
{
|
|
struct page *page = pfn_to_page(shadow_page >> PAGE_SHIFT);
|
|
|
|
return (struct kvm_mmu_page *)page_private(page);
|
|
}
|
|
|
|
static inline u16 read_fs(void)
|
|
{
|
|
u16 seg;
|
|
asm ("mov %%fs, %0" : "=g"(seg));
|
|
return seg;
|
|
}
|
|
|
|
static inline u16 read_gs(void)
|
|
{
|
|
u16 seg;
|
|
asm ("mov %%gs, %0" : "=g"(seg));
|
|
return seg;
|
|
}
|
|
|
|
static inline u16 read_ldt(void)
|
|
{
|
|
u16 ldt;
|
|
asm ("sldt %0" : "=g"(ldt));
|
|
return ldt;
|
|
}
|
|
|
|
static inline void load_fs(u16 sel)
|
|
{
|
|
asm ("mov %0, %%fs" : : "rm"(sel));
|
|
}
|
|
|
|
static inline void load_gs(u16 sel)
|
|
{
|
|
asm ("mov %0, %%gs" : : "rm"(sel));
|
|
}
|
|
|
|
#ifndef load_ldt
|
|
static inline void load_ldt(u16 sel)
|
|
{
|
|
asm ("lldt %0" : : "rm"(sel));
|
|
}
|
|
#endif
|
|
|
|
static inline void get_idt(struct descriptor_table *table)
|
|
{
|
|
asm ("sidt %0" : "=m"(*table));
|
|
}
|
|
|
|
static inline void get_gdt(struct descriptor_table *table)
|
|
{
|
|
asm ("sgdt %0" : "=m"(*table));
|
|
}
|
|
|
|
static inline unsigned long read_tr_base(void)
|
|
{
|
|
u16 tr;
|
|
asm ("str %0" : "=g"(tr));
|
|
return segment_base(tr);
|
|
}
|
|
|
|
#ifdef CONFIG_X86_64
|
|
static inline unsigned long read_msr(unsigned long msr)
|
|
{
|
|
u64 value;
|
|
|
|
rdmsrl(msr, value);
|
|
return value;
|
|
}
|
|
#endif
|
|
|
|
static inline void fx_save(void *image)
|
|
{
|
|
asm ("fxsave (%0)":: "r" (image));
|
|
}
|
|
|
|
static inline void fx_restore(void *image)
|
|
{
|
|
asm ("fxrstor (%0)":: "r" (image));
|
|
}
|
|
|
|
static inline void fpu_init(void)
|
|
{
|
|
asm ("finit");
|
|
}
|
|
|
|
static inline u32 get_rdx_init_val(void)
|
|
{
|
|
return 0x600; /* P6 family */
|
|
}
|
|
|
|
#define ASM_VMX_VMCLEAR_RAX ".byte 0x66, 0x0f, 0xc7, 0x30"
|
|
#define ASM_VMX_VMLAUNCH ".byte 0x0f, 0x01, 0xc2"
|
|
#define ASM_VMX_VMRESUME ".byte 0x0f, 0x01, 0xc3"
|
|
#define ASM_VMX_VMPTRLD_RAX ".byte 0x0f, 0xc7, 0x30"
|
|
#define ASM_VMX_VMREAD_RDX_RAX ".byte 0x0f, 0x78, 0xd0"
|
|
#define ASM_VMX_VMWRITE_RAX_RDX ".byte 0x0f, 0x79, 0xd0"
|
|
#define ASM_VMX_VMWRITE_RSP_RDX ".byte 0x0f, 0x79, 0xd4"
|
|
#define ASM_VMX_VMXOFF ".byte 0x0f, 0x01, 0xc4"
|
|
#define ASM_VMX_VMXON_RAX ".byte 0xf3, 0x0f, 0xc7, 0x30"
|
|
|
|
#define MSR_IA32_TIME_STAMP_COUNTER 0x010
|
|
|
|
#define TSS_IOPB_BASE_OFFSET 0x66
|
|
#define TSS_BASE_SIZE 0x68
|
|
#define TSS_IOPB_SIZE (65536 / 8)
|
|
#define TSS_REDIRECTION_SIZE (256 / 8)
|
|
#define RMODE_TSS_SIZE (TSS_BASE_SIZE + TSS_REDIRECTION_SIZE + TSS_IOPB_SIZE + 1)
|
|
|
|
#endif
|