forked from luck/tmp_suning_uos_patched
e33c019722
* 'x86-mm-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/linux-2.6-tip: (36 commits) x86, mm: Correct the implementation of is_untracked_pat_range() x86/pat: Trivial: don't create debugfs for memtype if pat is disabled x86, mtrr: Fix sorting of mtrr after subtracting x86: Move find_smp_config() earlier and avoid bootmem usage x86, platform: Change is_untracked_pat_range() to bool; cleanup init x86: Change is_ISA_range() into an inline function x86, mm: is_untracked_pat_range() takes a normal semiclosed range x86, mm: Call is_untracked_pat_range() rather than is_ISA_range() x86: UV SGI: Don't track GRU space in PAT x86: SGI UV: Fix BAU initialization x86, numa: Use near(er) online node instead of roundrobin for NUMA x86, numa, bootmem: Only free bootmem on NUMA failure path x86: Change crash kernel to reserve via reserve_early() x86: Eliminate redundant/contradicting cache line size config options x86: When cleaning MTRRs, do not fold WP into UC x86: remove "extern" from function prototypes in <asm/proto.h> x86, mm: Report state of NX protections during boot x86, mm: Clean up and simplify NX enablement x86, pageattr: Make set_memory_(x|nx) aware of NX support x86, sleep: Always save the value of EFER ... Fix up conflicts (added both iommu_shutdown and is_untracked_pat_range) to 'struct x86_platform_ops') in arch/x86/include/asm/x86_init.h arch/x86/kernel/x86_init.c
198 lines
6.8 KiB
C
198 lines
6.8 KiB
C
#ifndef _ASM_X86_CACHEFLUSH_H
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#define _ASM_X86_CACHEFLUSH_H
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/* Keep includes the same across arches. */
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#include <linux/mm.h>
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/* Caches aren't brain-dead on the intel. */
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static inline void flush_cache_all(void) { }
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static inline void flush_cache_mm(struct mm_struct *mm) { }
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static inline void flush_cache_dup_mm(struct mm_struct *mm) { }
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static inline void flush_cache_range(struct vm_area_struct *vma,
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unsigned long start, unsigned long end) { }
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static inline void flush_cache_page(struct vm_area_struct *vma,
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unsigned long vmaddr, unsigned long pfn) { }
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#define ARCH_IMPLEMENTS_FLUSH_DCACHE_PAGE 0
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static inline void flush_dcache_page(struct page *page) { }
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static inline void flush_dcache_mmap_lock(struct address_space *mapping) { }
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static inline void flush_dcache_mmap_unlock(struct address_space *mapping) { }
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static inline void flush_icache_range(unsigned long start,
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unsigned long end) { }
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static inline void flush_icache_page(struct vm_area_struct *vma,
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struct page *page) { }
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static inline void flush_icache_user_range(struct vm_area_struct *vma,
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struct page *page,
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unsigned long addr,
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unsigned long len) { }
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static inline void flush_cache_vmap(unsigned long start, unsigned long end) { }
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static inline void flush_cache_vunmap(unsigned long start,
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unsigned long end) { }
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static inline void copy_to_user_page(struct vm_area_struct *vma,
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struct page *page, unsigned long vaddr,
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void *dst, const void *src,
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unsigned long len)
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{
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memcpy(dst, src, len);
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}
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static inline void copy_from_user_page(struct vm_area_struct *vma,
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struct page *page, unsigned long vaddr,
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void *dst, const void *src,
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unsigned long len)
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{
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memcpy(dst, src, len);
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}
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#define PG_WC PG_arch_1
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PAGEFLAG(WC, WC)
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#ifdef CONFIG_X86_PAT
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/*
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* X86 PAT uses page flags WC and Uncached together to keep track of
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* memory type of pages that have backing page struct. X86 PAT supports 3
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* different memory types, _PAGE_CACHE_WB, _PAGE_CACHE_WC and
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* _PAGE_CACHE_UC_MINUS and fourth state where page's memory type has not
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* been changed from its default (value of -1 used to denote this).
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* Note we do not support _PAGE_CACHE_UC here.
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*
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* Caller must hold memtype_lock for atomicity.
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*/
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static inline unsigned long get_page_memtype(struct page *pg)
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{
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if (!PageUncached(pg) && !PageWC(pg))
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return -1;
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else if (!PageUncached(pg) && PageWC(pg))
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return _PAGE_CACHE_WC;
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else if (PageUncached(pg) && !PageWC(pg))
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return _PAGE_CACHE_UC_MINUS;
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else
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return _PAGE_CACHE_WB;
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}
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static inline void set_page_memtype(struct page *pg, unsigned long memtype)
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{
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switch (memtype) {
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case _PAGE_CACHE_WC:
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ClearPageUncached(pg);
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SetPageWC(pg);
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break;
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case _PAGE_CACHE_UC_MINUS:
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SetPageUncached(pg);
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ClearPageWC(pg);
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break;
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case _PAGE_CACHE_WB:
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SetPageUncached(pg);
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SetPageWC(pg);
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break;
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default:
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case -1:
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ClearPageUncached(pg);
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ClearPageWC(pg);
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break;
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}
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}
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#else
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static inline unsigned long get_page_memtype(struct page *pg) { return -1; }
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static inline void set_page_memtype(struct page *pg, unsigned long memtype) { }
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#endif
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/*
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* The set_memory_* API can be used to change various attributes of a virtual
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* address range. The attributes include:
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* Cachability : UnCached, WriteCombining, WriteBack
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* Executability : eXeutable, NoteXecutable
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* Read/Write : ReadOnly, ReadWrite
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* Presence : NotPresent
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*
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* Within a catagory, the attributes are mutually exclusive.
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*
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* The implementation of this API will take care of various aspects that
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* are associated with changing such attributes, such as:
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* - Flushing TLBs
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* - Flushing CPU caches
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* - Making sure aliases of the memory behind the mapping don't violate
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* coherency rules as defined by the CPU in the system.
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*
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* What this API does not do:
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* - Provide exclusion between various callers - including callers that
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* operation on other mappings of the same physical page
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* - Restore default attributes when a page is freed
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* - Guarantee that mappings other than the requested one are
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* in any state, other than that these do not violate rules for
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* the CPU you have. Do not depend on any effects on other mappings,
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* CPUs other than the one you have may have more relaxed rules.
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* The caller is required to take care of these.
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*/
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int _set_memory_uc(unsigned long addr, int numpages);
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int _set_memory_wc(unsigned long addr, int numpages);
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int _set_memory_wb(unsigned long addr, int numpages);
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int set_memory_uc(unsigned long addr, int numpages);
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int set_memory_wc(unsigned long addr, int numpages);
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int set_memory_wb(unsigned long addr, int numpages);
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int set_memory_x(unsigned long addr, int numpages);
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int set_memory_nx(unsigned long addr, int numpages);
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int set_memory_ro(unsigned long addr, int numpages);
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int set_memory_rw(unsigned long addr, int numpages);
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int set_memory_np(unsigned long addr, int numpages);
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int set_memory_4k(unsigned long addr, int numpages);
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int set_memory_array_uc(unsigned long *addr, int addrinarray);
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int set_memory_array_wb(unsigned long *addr, int addrinarray);
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int set_pages_array_uc(struct page **pages, int addrinarray);
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int set_pages_array_wb(struct page **pages, int addrinarray);
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/*
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* For legacy compatibility with the old APIs, a few functions
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* are provided that work on a "struct page".
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* These functions operate ONLY on the 1:1 kernel mapping of the
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* memory that the struct page represents, and internally just
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* call the set_memory_* function. See the description of the
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* set_memory_* function for more details on conventions.
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*
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* These APIs should be considered *deprecated* and are likely going to
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* be removed in the future.
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* The reason for this is the implicit operation on the 1:1 mapping only,
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* making this not a generally useful API.
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*
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* Specifically, many users of the old APIs had a virtual address,
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* called virt_to_page() or vmalloc_to_page() on that address to
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* get a struct page* that the old API required.
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* To convert these cases, use set_memory_*() on the original
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* virtual address, do not use these functions.
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*/
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int set_pages_uc(struct page *page, int numpages);
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int set_pages_wb(struct page *page, int numpages);
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int set_pages_x(struct page *page, int numpages);
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int set_pages_nx(struct page *page, int numpages);
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int set_pages_ro(struct page *page, int numpages);
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int set_pages_rw(struct page *page, int numpages);
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void clflush_cache_range(void *addr, unsigned int size);
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#ifdef CONFIG_DEBUG_RODATA
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void mark_rodata_ro(void);
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extern const int rodata_test_data;
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extern int kernel_set_to_readonly;
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void set_kernel_text_rw(void);
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void set_kernel_text_ro(void);
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#else
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static inline void set_kernel_text_rw(void) { }
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static inline void set_kernel_text_ro(void) { }
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#endif
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#ifdef CONFIG_DEBUG_RODATA_TEST
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int rodata_test(void);
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#else
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static inline int rodata_test(void)
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{
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return 0;
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}
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#endif
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#endif /* _ASM_X86_CACHEFLUSH_H */
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