forked from luck/tmp_suning_uos_patched
28bd3a0dcc
This patch adds support for the D-Link DSM-G600 Rev A. This is an ARM XScale IXP4xx system relatively similar to the NSLU2 and NAS-100D already supported by mainline. An important difference is Gigabit Ethernet support using the Via Velocity chipset. This patch is the combined work of Michael Westerhof and Alessandro Zummo, with contributions from Michael-Luke Jones. This version addresses review comments from rmk and Deepak Saxena. Signed-off-by: Michael-Luke Jones <mlj28@cam.ac.uk> Signed-off-by: Alessandro Zummo <a.zummo@towertech.it> Signed-off-by: Michael Westerhof <mwester@dls.net> Signed-off-by: Deepak Saxena <dsaxena@plexity.net> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
58 lines
1.4 KiB
C
58 lines
1.4 KiB
C
/*
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* DSM-G600 platform specific definitions
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*
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* Copyright (C) 2006 Tower Technologies
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* Author: Alessandro Zummo <a.zummo@towertech.it>
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*
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* based on ixdp425.h:
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* Copyright 2004 (C) MontaVista, Software, Inc.
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*
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* This file is licensed under the terms of the GNU General Public
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* License version 2. This program is licensed "as is" without any
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* warranty of any kind, whether express or implied.
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*/
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#ifndef __ASM_ARCH_HARDWARE_H__
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#error "Do not include this directly, instead #include <asm/hardware.h>"
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#endif
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#define DSMG600_SDA_PIN 5
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#define DSMG600_SCL_PIN 4
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/*
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* DSMG600 PCI IRQs
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*/
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#define DSMG600_PCI_MAX_DEV 4
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#define DSMG600_PCI_IRQ_LINES 3
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/* PCI controller GPIO to IRQ pin mappings */
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#define DSMG600_PCI_INTA_PIN 11
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#define DSMG600_PCI_INTB_PIN 10
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#define DSMG600_PCI_INTC_PIN 9
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#define DSMG600_PCI_INTD_PIN 8
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#define DSMG600_PCI_INTE_PIN 7
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#define DSMG600_PCI_INTF_PIN 6
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/* DSM-G600 Timer Setting */
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#define DSMG600_FREQ 66000000
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/* Buttons */
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#define DSMG600_PB_GPIO 15 /* power button */
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#define DSMG600_PB_BM (1L << DSMG600_PB_GPIO)
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#define DSMG600_RB_GPIO 3 /* reset button */
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#define DSMG600_RB_IRQ IRQ_IXP4XX_GPIO3
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#define DSMG600_PO_GPIO 2 /* power off */
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/* LEDs */
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#define DSMG600_LED_PWR_GPIO 0
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#define DSMG600_LED_PWR_BM (1L << DSMG600_LED_PWR_GPIO)
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#define DSMG600_LED_WLAN_GPIO 14
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#define DSMG600_LED_WLAN_BM (1L << DSMG600_LED_WLAN_GPIO)
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