forked from luck/tmp_suning_uos_patched
daf799cca8
Pull MIPS updates from Ralf Baechle: - More work on DT support for various platforms - Various fixes that were to late to make it straight into 3.9 - Improved platform support, in particular the Netlogic XLR and BCM63xx, and the SEAD3 and Malta eval boards. - Support for several Ralink SOC families. - Complete support for the microMIPS ASE which basically reencodes the existing MIPS32/MIPS64 ISA to use non-constant size instructions. - Some fallout from LTO work which remove old cruft and will generally make the MIPS kernel easier to maintain and resistant to compiler optimization, even in absence of LTO. - KVM support. While MIPS has announced hardware virtualization extensions this KVM extension uses trap and emulate mode for virtualization of MIPS32. More KVM work to add support for VZ hardware virtualizaiton extensions and MIPS64 will probably already be merged for 3.11. Most of this has been sitting in -next for a long time. All defconfigs have been build or run time tested except three for which fixes are being sent by other maintainers. Semantic conflict with kvm updates done as per Ralf * 'upstream' of git://git.linux-mips.org/pub/scm/ralf/upstream-linus: (118 commits) MIPS: Add new GIC clockevent driver. MIPS: Formatting clean-ups for clocksources. MIPS: Refactor GIC clocksource code. MIPS: Move 'gic_frequency' to common location. MIPS: Move 'gic_present' to common location. MIPS: MIPS16e: Add unaligned access support. MIPS: MIPS16e: Support handling of delay slots. MIPS: MIPS16e: Add instruction formats. MIPS: microMIPS: Optimise 'strnlen' core library function. MIPS: microMIPS: Optimise 'strlen' core library function. MIPS: microMIPS: Optimise 'strncpy' core library function. MIPS: microMIPS: Optimise 'memset' core library function. MIPS: microMIPS: Add configuration option for microMIPS kernel. MIPS: microMIPS: Disable LL/SC and fix linker bug. MIPS: microMIPS: Add vdso support. MIPS: microMIPS: Add unaligned access support. MIPS: microMIPS: Support handling of delay slots. MIPS: microMIPS: Add support for exception handling. MIPS: microMIPS: Floating point support. MIPS: microMIPS: Fix macro naming in micro-assembler. ...
559 lines
13 KiB
C
559 lines
13 KiB
C
/*
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* This file is subject to the terms and conditions of the GNU General Public
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* License. See the file "COPYING" in the main directory of this archive
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* for more details.
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*
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* Copyright (C) 1994 - 1999, 2000 by Ralf Baechle and others.
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* Copyright (C) 2005, 2006 by Ralf Baechle (ralf@linux-mips.org)
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* Copyright (C) 1999, 2000 Silicon Graphics, Inc.
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* Copyright (C) 2004 Thiemo Seufer
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* Copyright (C) 2013 Imagination Technologies Ltd.
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*/
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#include <linux/errno.h>
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#include <linux/sched.h>
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#include <linux/tick.h>
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#include <linux/kernel.h>
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#include <linux/mm.h>
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#include <linux/stddef.h>
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#include <linux/unistd.h>
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#include <linux/export.h>
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#include <linux/ptrace.h>
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#include <linux/mman.h>
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#include <linux/personality.h>
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#include <linux/sys.h>
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#include <linux/user.h>
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#include <linux/init.h>
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#include <linux/completion.h>
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#include <linux/kallsyms.h>
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#include <linux/random.h>
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#include <asm/asm.h>
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#include <asm/bootinfo.h>
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#include <asm/cpu.h>
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#include <asm/dsp.h>
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#include <asm/fpu.h>
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#include <asm/pgtable.h>
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#include <asm/mipsregs.h>
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#include <asm/processor.h>
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#include <asm/uaccess.h>
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#include <asm/io.h>
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#include <asm/elf.h>
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#include <asm/isadep.h>
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#include <asm/inst.h>
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#include <asm/stacktrace.h>
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#ifdef CONFIG_HOTPLUG_CPU
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void arch_cpu_idle_dead(void)
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{
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/* What the heck is this check doing ? */
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if (!cpu_isset(smp_processor_id(), cpu_callin_map))
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play_dead();
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}
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#endif
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void arch_cpu_idle(void)
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{
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#ifdef CONFIG_MIPS_MT_SMTC
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extern void smtc_idle_loop_hook(void);
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smtc_idle_loop_hook();
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#endif
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if (cpu_wait)
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(*cpu_wait)();
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else
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local_irq_enable();
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}
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asmlinkage void ret_from_fork(void);
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asmlinkage void ret_from_kernel_thread(void);
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void start_thread(struct pt_regs * regs, unsigned long pc, unsigned long sp)
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{
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unsigned long status;
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/* New thread loses kernel privileges. */
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status = regs->cp0_status & ~(ST0_CU0|ST0_CU1|ST0_FR|KU_MASK);
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#ifdef CONFIG_64BIT
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status |= test_thread_flag(TIF_32BIT_REGS) ? 0 : ST0_FR;
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#endif
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status |= KU_USER;
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regs->cp0_status = status;
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clear_used_math();
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clear_fpu_owner();
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if (cpu_has_dsp)
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__init_dsp();
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regs->cp0_epc = pc;
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regs->regs[29] = sp;
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}
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void exit_thread(void)
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{
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}
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void flush_thread(void)
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{
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}
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int copy_thread(unsigned long clone_flags, unsigned long usp,
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unsigned long arg, struct task_struct *p)
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{
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struct thread_info *ti = task_thread_info(p);
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struct pt_regs *childregs, *regs = current_pt_regs();
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unsigned long childksp;
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p->set_child_tid = p->clear_child_tid = NULL;
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childksp = (unsigned long)task_stack_page(p) + THREAD_SIZE - 32;
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preempt_disable();
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if (is_fpu_owner())
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save_fp(p);
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if (cpu_has_dsp)
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save_dsp(p);
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preempt_enable();
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/* set up new TSS. */
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childregs = (struct pt_regs *) childksp - 1;
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/* Put the stack after the struct pt_regs. */
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childksp = (unsigned long) childregs;
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p->thread.cp0_status = read_c0_status() & ~(ST0_CU2|ST0_CU1);
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if (unlikely(p->flags & PF_KTHREAD)) {
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unsigned long status = p->thread.cp0_status;
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memset(childregs, 0, sizeof(struct pt_regs));
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ti->addr_limit = KERNEL_DS;
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p->thread.reg16 = usp; /* fn */
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p->thread.reg17 = arg;
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p->thread.reg29 = childksp;
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p->thread.reg31 = (unsigned long) ret_from_kernel_thread;
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#if defined(CONFIG_CPU_R3000) || defined(CONFIG_CPU_TX39XX)
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status = (status & ~(ST0_KUP | ST0_IEP | ST0_IEC)) |
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((status & (ST0_KUC | ST0_IEC)) << 2);
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#else
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status |= ST0_EXL;
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#endif
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childregs->cp0_status = status;
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return 0;
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}
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*childregs = *regs;
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childregs->regs[7] = 0; /* Clear error flag */
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childregs->regs[2] = 0; /* Child gets zero as return value */
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if (usp)
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childregs->regs[29] = usp;
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ti->addr_limit = USER_DS;
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p->thread.reg29 = (unsigned long) childregs;
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p->thread.reg31 = (unsigned long) ret_from_fork;
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/*
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* New tasks lose permission to use the fpu. This accelerates context
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* switching for most programs since they don't use the fpu.
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*/
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childregs->cp0_status &= ~(ST0_CU2|ST0_CU1);
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#ifdef CONFIG_MIPS_MT_SMTC
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/*
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* SMTC restores TCStatus after Status, and the CU bits
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* are aliased there.
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*/
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childregs->cp0_tcstatus &= ~(ST0_CU2|ST0_CU1);
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#endif
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clear_tsk_thread_flag(p, TIF_USEDFPU);
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#ifdef CONFIG_MIPS_MT_FPAFF
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clear_tsk_thread_flag(p, TIF_FPUBOUND);
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#endif /* CONFIG_MIPS_MT_FPAFF */
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if (clone_flags & CLONE_SETTLS)
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ti->tp_value = regs->regs[7];
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return 0;
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}
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/* Fill in the fpu structure for a core dump.. */
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int dump_fpu(struct pt_regs *regs, elf_fpregset_t *r)
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{
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memcpy(r, ¤t->thread.fpu, sizeof(current->thread.fpu));
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return 1;
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}
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void elf_dump_regs(elf_greg_t *gp, struct pt_regs *regs)
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{
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int i;
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for (i = 0; i < EF_R0; i++)
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gp[i] = 0;
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gp[EF_R0] = 0;
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for (i = 1; i <= 31; i++)
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gp[EF_R0 + i] = regs->regs[i];
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gp[EF_R26] = 0;
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gp[EF_R27] = 0;
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gp[EF_LO] = regs->lo;
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gp[EF_HI] = regs->hi;
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gp[EF_CP0_EPC] = regs->cp0_epc;
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gp[EF_CP0_BADVADDR] = regs->cp0_badvaddr;
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gp[EF_CP0_STATUS] = regs->cp0_status;
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gp[EF_CP0_CAUSE] = regs->cp0_cause;
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#ifdef EF_UNUSED0
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gp[EF_UNUSED0] = 0;
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#endif
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}
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int dump_task_regs(struct task_struct *tsk, elf_gregset_t *regs)
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{
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elf_dump_regs(*regs, task_pt_regs(tsk));
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return 1;
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}
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int dump_task_fpu(struct task_struct *t, elf_fpregset_t *fpr)
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{
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memcpy(fpr, &t->thread.fpu, sizeof(current->thread.fpu));
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return 1;
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}
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/*
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*
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*/
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struct mips_frame_info {
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void *func;
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unsigned long func_size;
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int frame_size;
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int pc_offset;
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};
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static inline int is_ra_save_ins(union mips_instruction *ip)
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{
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#ifdef CONFIG_CPU_MICROMIPS
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union mips_instruction mmi;
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/*
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* swsp ra,offset
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* swm16 reglist,offset(sp)
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* swm32 reglist,offset(sp)
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* sw32 ra,offset(sp)
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* jradiussp - NOT SUPPORTED
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*
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* microMIPS is way more fun...
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*/
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if (mm_insn_16bit(ip->halfword[0])) {
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mmi.word = (ip->halfword[0] << 16);
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return ((mmi.mm16_r5_format.opcode == mm_swsp16_op &&
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mmi.mm16_r5_format.rt == 31) ||
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(mmi.mm16_m_format.opcode == mm_pool16c_op &&
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mmi.mm16_m_format.func == mm_swm16_op));
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}
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else {
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mmi.halfword[0] = ip->halfword[1];
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mmi.halfword[1] = ip->halfword[0];
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return ((mmi.mm_m_format.opcode == mm_pool32b_op &&
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mmi.mm_m_format.rd > 9 &&
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mmi.mm_m_format.base == 29 &&
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mmi.mm_m_format.func == mm_swm32_func) ||
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(mmi.i_format.opcode == mm_sw32_op &&
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mmi.i_format.rs == 29 &&
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mmi.i_format.rt == 31));
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}
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#else
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/* sw / sd $ra, offset($sp) */
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return (ip->i_format.opcode == sw_op || ip->i_format.opcode == sd_op) &&
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ip->i_format.rs == 29 &&
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ip->i_format.rt == 31;
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#endif
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}
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static inline int is_jal_jalr_jr_ins(union mips_instruction *ip)
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{
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#ifdef CONFIG_CPU_MICROMIPS
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/*
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* jr16,jrc,jalr16,jalr16
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* jal
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* jalr/jr,jalr.hb/jr.hb,jalrs,jalrs.hb
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* jraddiusp - NOT SUPPORTED
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*
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* microMIPS is kind of more fun...
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*/
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union mips_instruction mmi;
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mmi.word = (ip->halfword[0] << 16);
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if ((mmi.mm16_r5_format.opcode == mm_pool16c_op &&
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(mmi.mm16_r5_format.rt & mm_jr16_op) == mm_jr16_op) ||
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ip->j_format.opcode == mm_jal32_op)
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return 1;
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if (ip->r_format.opcode != mm_pool32a_op ||
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ip->r_format.func != mm_pool32axf_op)
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return 0;
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return (((ip->u_format.uimmediate >> 6) & mm_jalr_op) == mm_jalr_op);
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#else
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if (ip->j_format.opcode == jal_op)
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return 1;
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if (ip->r_format.opcode != spec_op)
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return 0;
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return ip->r_format.func == jalr_op || ip->r_format.func == jr_op;
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#endif
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}
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static inline int is_sp_move_ins(union mips_instruction *ip)
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{
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#ifdef CONFIG_CPU_MICROMIPS
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/*
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* addiusp -imm
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* addius5 sp,-imm
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* addiu32 sp,sp,-imm
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* jradiussp - NOT SUPPORTED
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*
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* microMIPS is not more fun...
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*/
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if (mm_insn_16bit(ip->halfword[0])) {
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union mips_instruction mmi;
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mmi.word = (ip->halfword[0] << 16);
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return ((mmi.mm16_r3_format.opcode == mm_pool16d_op &&
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mmi.mm16_r3_format.simmediate && mm_addiusp_func) ||
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(mmi.mm16_r5_format.opcode == mm_pool16d_op &&
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mmi.mm16_r5_format.rt == 29));
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}
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return (ip->mm_i_format.opcode == mm_addiu32_op &&
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ip->mm_i_format.rt == 29 && ip->mm_i_format.rs == 29);
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#else
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/* addiu/daddiu sp,sp,-imm */
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if (ip->i_format.rs != 29 || ip->i_format.rt != 29)
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return 0;
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if (ip->i_format.opcode == addiu_op || ip->i_format.opcode == daddiu_op)
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return 1;
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#endif
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return 0;
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}
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static int get_frame_info(struct mips_frame_info *info)
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{
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#ifdef CONFIG_CPU_MICROMIPS
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union mips_instruction *ip = (void *) (((char *) info->func) - 1);
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#else
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union mips_instruction *ip = info->func;
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#endif
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unsigned max_insns = info->func_size / sizeof(union mips_instruction);
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unsigned i;
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info->pc_offset = -1;
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info->frame_size = 0;
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if (!ip)
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goto err;
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if (max_insns == 0)
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max_insns = 128U; /* unknown function size */
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max_insns = min(128U, max_insns);
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for (i = 0; i < max_insns; i++, ip++) {
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if (is_jal_jalr_jr_ins(ip))
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break;
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if (!info->frame_size) {
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if (is_sp_move_ins(ip))
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{
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#ifdef CONFIG_CPU_MICROMIPS
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if (mm_insn_16bit(ip->halfword[0]))
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{
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unsigned short tmp;
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if (ip->halfword[0] & mm_addiusp_func)
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{
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tmp = (((ip->halfword[0] >> 1) & 0x1ff) << 2);
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info->frame_size = -(signed short)(tmp | ((tmp & 0x100) ? 0xfe00 : 0));
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} else {
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tmp = (ip->halfword[0] >> 1);
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info->frame_size = -(signed short)(tmp & 0xf);
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}
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ip = (void *) &ip->halfword[1];
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ip--;
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} else
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#endif
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info->frame_size = - ip->i_format.simmediate;
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}
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continue;
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}
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if (info->pc_offset == -1 && is_ra_save_ins(ip)) {
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info->pc_offset =
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ip->i_format.simmediate / sizeof(long);
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break;
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}
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}
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if (info->frame_size && info->pc_offset >= 0) /* nested */
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return 0;
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if (info->pc_offset < 0) /* leaf */
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return 1;
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/* prologue seems boggus... */
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err:
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return -1;
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}
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static struct mips_frame_info schedule_mfi __read_mostly;
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static int __init frame_info_init(void)
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{
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unsigned long size = 0;
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#ifdef CONFIG_KALLSYMS
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unsigned long ofs;
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kallsyms_lookup_size_offset((unsigned long)schedule, &size, &ofs);
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#endif
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schedule_mfi.func = schedule;
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schedule_mfi.func_size = size;
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get_frame_info(&schedule_mfi);
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/*
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* Without schedule() frame info, result given by
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* thread_saved_pc() and get_wchan() are not reliable.
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*/
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if (schedule_mfi.pc_offset < 0)
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printk("Can't analyze schedule() prologue at %p\n", schedule);
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return 0;
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}
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arch_initcall(frame_info_init);
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/*
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* Return saved PC of a blocked thread.
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*/
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unsigned long thread_saved_pc(struct task_struct *tsk)
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{
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struct thread_struct *t = &tsk->thread;
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/* New born processes are a special case */
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if (t->reg31 == (unsigned long) ret_from_fork)
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return t->reg31;
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if (schedule_mfi.pc_offset < 0)
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return 0;
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return ((unsigned long *)t->reg29)[schedule_mfi.pc_offset];
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}
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#ifdef CONFIG_KALLSYMS
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/* generic stack unwinding function */
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unsigned long notrace unwind_stack_by_address(unsigned long stack_page,
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unsigned long *sp,
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unsigned long pc,
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unsigned long *ra)
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{
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struct mips_frame_info info;
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unsigned long size, ofs;
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int leaf;
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extern void ret_from_irq(void);
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extern void ret_from_exception(void);
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if (!stack_page)
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return 0;
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/*
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* If we reached the bottom of interrupt context,
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* return saved pc in pt_regs.
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*/
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if (pc == (unsigned long)ret_from_irq ||
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pc == (unsigned long)ret_from_exception) {
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struct pt_regs *regs;
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if (*sp >= stack_page &&
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*sp + sizeof(*regs) <= stack_page + THREAD_SIZE - 32) {
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regs = (struct pt_regs *)*sp;
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pc = regs->cp0_epc;
|
|
if (__kernel_text_address(pc)) {
|
|
*sp = regs->regs[29];
|
|
*ra = regs->regs[31];
|
|
return pc;
|
|
}
|
|
}
|
|
return 0;
|
|
}
|
|
if (!kallsyms_lookup_size_offset(pc, &size, &ofs))
|
|
return 0;
|
|
/*
|
|
* Return ra if an exception occurred at the first instruction
|
|
*/
|
|
if (unlikely(ofs == 0)) {
|
|
pc = *ra;
|
|
*ra = 0;
|
|
return pc;
|
|
}
|
|
|
|
info.func = (void *)(pc - ofs);
|
|
info.func_size = ofs; /* analyze from start to ofs */
|
|
leaf = get_frame_info(&info);
|
|
if (leaf < 0)
|
|
return 0;
|
|
|
|
if (*sp < stack_page ||
|
|
*sp + info.frame_size > stack_page + THREAD_SIZE - 32)
|
|
return 0;
|
|
|
|
if (leaf)
|
|
/*
|
|
* For some extreme cases, get_frame_info() can
|
|
* consider wrongly a nested function as a leaf
|
|
* one. In that cases avoid to return always the
|
|
* same value.
|
|
*/
|
|
pc = pc != *ra ? *ra : 0;
|
|
else
|
|
pc = ((unsigned long *)(*sp))[info.pc_offset];
|
|
|
|
*sp += info.frame_size;
|
|
*ra = 0;
|
|
return __kernel_text_address(pc) ? pc : 0;
|
|
}
|
|
EXPORT_SYMBOL(unwind_stack_by_address);
|
|
|
|
/* used by show_backtrace() */
|
|
unsigned long unwind_stack(struct task_struct *task, unsigned long *sp,
|
|
unsigned long pc, unsigned long *ra)
|
|
{
|
|
unsigned long stack_page = (unsigned long)task_stack_page(task);
|
|
return unwind_stack_by_address(stack_page, sp, pc, ra);
|
|
}
|
|
#endif
|
|
|
|
/*
|
|
* get_wchan - a maintenance nightmare^W^Wpain in the ass ...
|
|
*/
|
|
unsigned long get_wchan(struct task_struct *task)
|
|
{
|
|
unsigned long pc = 0;
|
|
#ifdef CONFIG_KALLSYMS
|
|
unsigned long sp;
|
|
unsigned long ra = 0;
|
|
#endif
|
|
|
|
if (!task || task == current || task->state == TASK_RUNNING)
|
|
goto out;
|
|
if (!task_stack_page(task))
|
|
goto out;
|
|
|
|
pc = thread_saved_pc(task);
|
|
|
|
#ifdef CONFIG_KALLSYMS
|
|
sp = task->thread.reg29 + schedule_mfi.frame_size;
|
|
|
|
while (in_sched_functions(pc))
|
|
pc = unwind_stack(task, &sp, pc, &ra);
|
|
#endif
|
|
|
|
out:
|
|
return pc;
|
|
}
|
|
|
|
/*
|
|
* Don't forget that the stack pointer must be aligned on a 8 bytes
|
|
* boundary for 32-bits ABI and 16 bytes for 64-bits ABI.
|
|
*/
|
|
unsigned long arch_align_stack(unsigned long sp)
|
|
{
|
|
if (!(current->personality & ADDR_NO_RANDOMIZE) && randomize_va_space)
|
|
sp -= get_random_int() & ~PAGE_MASK;
|
|
|
|
return sp & ALMASK;
|
|
}
|