forked from luck/tmp_suning_uos_patched
d2912cb15b
Based on 2 normalized pattern(s): this program is free software you can redistribute it and or modify it under the terms of the gnu general public license version 2 as published by the free software foundation this program is free software you can redistribute it and or modify it under the terms of the gnu general public license version 2 as published by the free software foundation # extracted by the scancode license scanner the SPDX license identifier GPL-2.0-only has been chosen to replace the boilerplate/reference in 4122 file(s). Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Reviewed-by: Enrico Weigelt <info@metux.net> Reviewed-by: Kate Stewart <kstewart@linuxfoundation.org> Reviewed-by: Allison Randal <allison@lohutok.net> Cc: linux-spdx@vger.kernel.org Link: https://lkml.kernel.org/r/20190604081206.933168790@linutronix.de Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
85 lines
1.8 KiB
C
85 lines
1.8 KiB
C
// SPDX-License-Identifier: GPL-2.0-only
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/*
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* External Memory Interface
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*
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* Copyright (C) 2011 Texas Instruments Incorporated
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* Author: Mark Salter <msalter@redhat.com>
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*/
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#include <linux/of.h>
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#include <linux/of_address.h>
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#include <linux/io.h>
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#include <asm/soc.h>
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#include <asm/dscr.h>
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#define NUM_EMIFA_CHIP_ENABLES 4
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struct emifa_regs {
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u32 midr;
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u32 stat;
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u32 reserved1[6];
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u32 bprio;
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u32 reserved2[23];
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u32 cecfg[NUM_EMIFA_CHIP_ENABLES];
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u32 reserved3[4];
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u32 awcc;
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u32 reserved4[7];
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u32 intraw;
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u32 intmsk;
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u32 intmskset;
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u32 intmskclr;
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};
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static struct of_device_id emifa_match[] __initdata = {
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{ .compatible = "ti,c64x+emifa" },
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{}
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};
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/*
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* Parse device tree for existence of an EMIF (External Memory Interface)
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* and initialize it if found.
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*/
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static int __init c6x_emifa_init(void)
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{
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struct emifa_regs __iomem *regs;
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struct device_node *node;
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const __be32 *p;
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u32 val;
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int i, len, err;
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node = of_find_matching_node(NULL, emifa_match);
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if (!node)
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return 0;
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regs = of_iomap(node, 0);
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if (!regs)
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return 0;
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/* look for a dscr-based enable for emifa pin buffers */
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err = of_property_read_u32_array(node, "ti,dscr-dev-enable", &val, 1);
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if (!err)
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dscr_set_devstate(val, DSCR_DEVSTATE_ENABLED);
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/* set up the chip enables */
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p = of_get_property(node, "ti,emifa-ce-config", &len);
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if (p) {
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len /= sizeof(u32);
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if (len > NUM_EMIFA_CHIP_ENABLES)
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len = NUM_EMIFA_CHIP_ENABLES;
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for (i = 0; i <= len; i++)
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soc_writel(be32_to_cpup(&p[i]), ®s->cecfg[i]);
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}
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err = of_property_read_u32_array(node, "ti,emifa-burst-priority", &val, 1);
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if (!err)
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soc_writel(val, ®s->bprio);
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err = of_property_read_u32_array(node, "ti,emifa-async-wait-control", &val, 1);
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if (!err)
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soc_writel(val, ®s->awcc);
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iounmap(regs);
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of_node_put(node);
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return 0;
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}
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pure_initcall(c6x_emifa_init);
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