forked from luck/tmp_suning_uos_patched
141 lines
7.1 KiB
C
141 lines
7.1 KiB
C
/*
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*
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* BRIEF MODULE DESCRIPTION
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* Interrupt specific definitions
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*
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* Author: source@mvista.com
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*
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* This program is free software; you can distribute it and/or modify it
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* under the terms of the GNU General Public License (Version 2) as
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* published by the Free Software Foundation.
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*
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* This program is distributed in the hope it will be useful, but WITHOUT
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* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
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* for more details.
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*
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* You should have received a copy of the GNU General Public License along
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* with this program; if not, write to the Free Software Foundation, Inc.,
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* 59 Temple Place - Suite 330, Boston MA 02111-1307, USA.
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*/
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#ifndef __PNX8550_INT_H
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#define __PNX8550_INT_H
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#define PNX8550_GIC_BASE 0xBBE3E000
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#define PNX8550_GIC_PRIMASK_0 *(volatile unsigned long *)(PNX8550_GIC_BASE + 0x000)
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#define PNX8550_GIC_PRIMASK_1 *(volatile unsigned long *)(PNX8550_GIC_BASE + 0x004)
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#define PNX8550_GIC_VECTOR_0 *(volatile unsigned long *)(PNX8550_GIC_BASE + 0x100)
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#define PNX8550_GIC_VECTOR_1 *(volatile unsigned long *)(PNX8550_GIC_BASE + 0x104)
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#define PNX8550_GIC_PEND_1_31 *(volatile unsigned long *)(PNX8550_GIC_BASE + 0x200)
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#define PNX8550_GIC_PEND_32_63 *(volatile unsigned long *)(PNX8550_GIC_BASE + 0x204)
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#define PNX8550_GIC_PEND_64_70 *(volatile unsigned long *)(PNX8550_GIC_BASE + 0x208)
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#define PNX8550_GIC_FEATURES *(volatile unsigned long *)(PNX8550_GIC_BASE + 0x300)
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#define PNX8550_GIC_REQ(x) *(volatile unsigned long *)(PNX8550_GIC_BASE + 0x400 + (x)*4)
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#define PNX8550_GIC_MOD_ID *(volatile unsigned long *)(PNX8550_GIC_BASE + 0xFFC)
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// cp0 is two software + six hw exceptions
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#define PNX8550_INT_CP0_TOTINT 8
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#define PNX8550_INT_CP0_MIN 0
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#define PNX8550_INT_CP0_MAX (PNX8550_INT_CP0_MIN + PNX8550_INT_CP0_TOTINT - 1)
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#define MIPS_CPU_GIC_IRQ 2
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#define MIPS_CPU_TIMER_IRQ 7
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// GIC are 71 exceptions connected to cp0's first hardware exception
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#define PNX8550_INT_GIC_TOTINT 71
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#define PNX8550_INT_GIC_MIN (PNX8550_INT_CP0_MAX+1)
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#define PNX8550_INT_GIC_MAX (PNX8550_INT_GIC_MIN + PNX8550_INT_GIC_TOTINT - 1)
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#define PNX8550_INT_UNDEF (PNX8550_INT_GIC_MIN+0)
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#define PNX8550_INT_IPC_TARGET0_MIPS (PNX8550_INT_GIC_MIN+1)
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#define PNX8550_INT_IPC_TARGET1_TM32_1 (PNX8550_INT_GIC_MIN+2)
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#define PNX8550_INT_IPC_TARGET1_TM32_2 (PNX8550_INT_GIC_MIN+3)
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#define PNX8550_INT_RESERVED_4 (PNX8550_INT_GIC_MIN+4)
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#define PNX8550_INT_USB (PNX8550_INT_GIC_MIN+5)
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#define PNX8550_INT_GPIO_EQ1 (PNX8550_INT_GIC_MIN+6)
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#define PNX8550_INT_GPIO_EQ2 (PNX8550_INT_GIC_MIN+7)
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#define PNX8550_INT_GPIO_EQ3 (PNX8550_INT_GIC_MIN+8)
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#define PNX8550_INT_GPIO_EQ4 (PNX8550_INT_GIC_MIN+9)
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#define PNX8550_INT_GPIO_EQ5 (PNX8550_INT_GIC_MIN+10)
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#define PNX8550_INT_GPIO_EQ6 (PNX8550_INT_GIC_MIN+11)
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#define PNX8550_INT_RESERVED_12 (PNX8550_INT_GIC_MIN+12)
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#define PNX8550_INT_QVCP1 (PNX8550_INT_GIC_MIN+13)
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#define PNX8550_INT_QVCP2 (PNX8550_INT_GIC_MIN+14)
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#define PNX8550_INT_I2C1 (PNX8550_INT_GIC_MIN+15)
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#define PNX8550_INT_I2C2 (PNX8550_INT_GIC_MIN+16)
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#define PNX8550_INT_ISO_UART1 (PNX8550_INT_GIC_MIN+17)
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#define PNX8550_INT_ISO_UART2 (PNX8550_INT_GIC_MIN+18)
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#define PNX8550_INT_UART1 (PNX8550_INT_GIC_MIN+19)
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#define PNX8550_INT_UART2 (PNX8550_INT_GIC_MIN+20)
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#define PNX8550_INT_QNTR (PNX8550_INT_GIC_MIN+21)
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#define PNX8550_INT_RESERVED22 (PNX8550_INT_GIC_MIN+22)
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#define PNX8550_INT_T_DSC (PNX8550_INT_GIC_MIN+23)
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#define PNX8550_INT_M_DSC (PNX8550_INT_GIC_MIN+24)
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#define PNX8550_INT_RESERVED25 (PNX8550_INT_GIC_MIN+25)
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#define PNX8550_INT_2D_DRAW_ENG (PNX8550_INT_GIC_MIN+26)
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#define PNX8550_INT_MEM_BASED_SCALAR1 (PNX8550_INT_GIC_MIN+27)
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#define PNX8550_INT_VIDEO_MPEG (PNX8550_INT_GIC_MIN+28)
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#define PNX8550_INT_VIDEO_INPUT_P1 (PNX8550_INT_GIC_MIN+29)
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#define PNX8550_INT_VIDEO_INPUT_P2 (PNX8550_INT_GIC_MIN+30)
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#define PNX8550_INT_SPDI1 (PNX8550_INT_GIC_MIN+31)
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#define PNX8550_INT_SPDO (PNX8550_INT_GIC_MIN+32)
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#define PNX8550_INT_AUDIO_INPUT1 (PNX8550_INT_GIC_MIN+33)
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#define PNX8550_INT_AUDIO_OUTPUT1 (PNX8550_INT_GIC_MIN+34)
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#define PNX8550_INT_AUDIO_INPUT2 (PNX8550_INT_GIC_MIN+35)
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#define PNX8550_INT_AUDIO_OUTPUT2 (PNX8550_INT_GIC_MIN+36)
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#define PNX8550_INT_MEMBASED_SCALAR2 (PNX8550_INT_GIC_MIN+37)
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#define PNX8550_INT_VPK (PNX8550_INT_GIC_MIN+38)
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#define PNX8550_INT_MPEG1_MIPS (PNX8550_INT_GIC_MIN+39)
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#define PNX8550_INT_MPEG1_TM (PNX8550_INT_GIC_MIN+40)
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#define PNX8550_INT_MPEG2_MIPS (PNX8550_INT_GIC_MIN+41)
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#define PNX8550_INT_MPEG2_TM (PNX8550_INT_GIC_MIN+42)
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#define PNX8550_INT_TS_DMA (PNX8550_INT_GIC_MIN+43)
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#define PNX8550_INT_EDMA (PNX8550_INT_GIC_MIN+44)
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#define PNX8550_INT_TM_DEBUG1 (PNX8550_INT_GIC_MIN+45)
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#define PNX8550_INT_TM_DEBUG2 (PNX8550_INT_GIC_MIN+46)
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#define PNX8550_INT_PCI_INTA (PNX8550_INT_GIC_MIN+47)
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#define PNX8550_INT_CLOCK_MODULE (PNX8550_INT_GIC_MIN+48)
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#define PNX8550_INT_PCI_XIO_INTA_PCI (PNX8550_INT_GIC_MIN+49)
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#define PNX8550_INT_PCI_XIO_INTB_DMA (PNX8550_INT_GIC_MIN+50)
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#define PNX8550_INT_PCI_XIO_INTC_GPPM (PNX8550_INT_GIC_MIN+51)
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#define PNX8550_INT_PCI_XIO_INTD_GPXIO (PNX8550_INT_GIC_MIN+52)
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#define PNX8550_INT_DVD_CSS (PNX8550_INT_GIC_MIN+53)
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#define PNX8550_INT_VLD (PNX8550_INT_GIC_MIN+54)
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#define PNX8550_INT_GPIO_TSU_7_0 (PNX8550_INT_GIC_MIN+55)
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#define PNX8550_INT_GPIO_TSU_15_8 (PNX8550_INT_GIC_MIN+56)
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#define PNX8550_INT_GPIO_CTU_IR (PNX8550_INT_GIC_MIN+57)
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#define PNX8550_INT_GPIO0 (PNX8550_INT_GIC_MIN+58)
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#define PNX8550_INT_GPIO1 (PNX8550_INT_GIC_MIN+59)
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#define PNX8550_INT_GPIO2 (PNX8550_INT_GIC_MIN+60)
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#define PNX8550_INT_GPIO3 (PNX8550_INT_GIC_MIN+61)
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#define PNX8550_INT_GPIO4 (PNX8550_INT_GIC_MIN+62)
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#define PNX8550_INT_GPIO5 (PNX8550_INT_GIC_MIN+63)
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#define PNX8550_INT_GPIO6 (PNX8550_INT_GIC_MIN+64)
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#define PNX8550_INT_GPIO7 (PNX8550_INT_GIC_MIN+65)
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#define PNX8550_INT_PMAN_SECURITY (PNX8550_INT_GIC_MIN+66)
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#define PNX8550_INT_I2C3 (PNX8550_INT_GIC_MIN+67)
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#define PNX8550_INT_RESERVED_68 (PNX8550_INT_GIC_MIN+68)
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#define PNX8550_INT_SPDI2 (PNX8550_INT_GIC_MIN+69)
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#define PNX8550_INT_I2C4 (PNX8550_INT_GIC_MIN+70)
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// Timer are 3 exceptions connected to cp0's 7th hardware exception
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#define PNX8550_INT_TIMER_TOTINT 3
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#define PNX8550_INT_TIMER_MIN (PNX8550_INT_GIC_MAX+1)
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#define PNX8550_INT_TIMER_MAX (PNX8550_INT_TIMER_MIN + PNX8550_INT_TIMER_TOTINT - 1)
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#define PNX8550_INT_TIMER1 (PNX8550_INT_TIMER_MIN+0)
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#define PNX8550_INT_TIMER2 (PNX8550_INT_TIMER_MIN+1)
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#define PNX8550_INT_TIMER3 (PNX8550_INT_TIMER_MIN+2)
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#define PNX8550_INT_WATCHDOG PNX8550_INT_TIMER3
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#endif
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