Andy Shevchenko 6bea0f6d1c dmaengine: dw: properly read DWC_PARAMS register ... In case we have less than maximum allowed channels (8) and autoconfiguration is enabled the DWC_PARAMS read is wrong because it uses different arithmetic to what is needed for channel priority setup. Re-do the caclulations properly. This now works on AVR32 board well. Fixes: fed2574b3c (dw_dmac: introduce software emulation of LLP transfers) Cc: yitian.bu@tangramtek.com Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Signed-off-by: Vinod Koul <vinod.koul@intel.com>		2015-09-30 13:42:02 +05:30
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core.c
internal.h
Kconfig
Makefile
pci.c
platform.c
regs.h