forked from luck/tmp_suning_uos_patched
d0a3431a7b
This is a combination of the the Intel algorithm implemented using SSE and PCLMULQDQ instructions from arch/x86/crypto/crc32-pclmul_asm.S, and the new CRC32 extensions introduced for both 32-bit and 64-bit ARM in version 8 of the architecture. Two versions of the above combo are provided, one for CRC32 and one for CRC32C. The PMULL/NEON algorithm is faster, but operates on blocks of at least 64 bytes, and on multiples of 16 bytes only. For the remaining input, or for all input on systems that lack the PMULL 64x64->128 instructions, the CRC32 instructions will be used. Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au> |
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| .. | ||
| .gitignore | ||
| aes_glue.c | ||
| aes_glue.h | ||
| aes-armv4.S | ||
| aes-ce-core.S | ||
| aes-ce-glue.c | ||
| aesbs-core.S_shipped | ||
| aesbs-glue.c | ||
| bsaes-armv7.pl | ||
| crc32-ce-core.S | ||
| crc32-ce-glue.c | ||
| crct10dif-ce-core.S | ||
| crct10dif-ce-glue.c | ||
| ghash-ce-core.S | ||
| ghash-ce-glue.c | ||
| Kconfig | ||
| Makefile | ||
| sha1_glue.c | ||
| sha1_neon_glue.c | ||
| sha1-armv4-large.S | ||
| sha1-armv7-neon.S | ||
| sha1-ce-core.S | ||
| sha1-ce-glue.c | ||
| sha1.h | ||
| sha2-ce-core.S | ||
| sha2-ce-glue.c | ||
| sha256_glue.c | ||
| sha256_glue.h | ||
| sha256_neon_glue.c | ||
| sha256-armv4.pl | ||
| sha256-core.S_shipped | ||
| sha512-armv4.pl | ||
| sha512-core.S_shipped | ||
| sha512-glue.c | ||
| sha512-neon-glue.c | ||
| sha512.h | ||