forked from luck/tmp_suning_uos_patched
a4b8c18c40
Commit edf4100906 ("ARM: shmobile: sh7372 dtsi: Remove Legacy
file") removed the DTS for the last shmobile SoC with a Cortex A8 CPU
core (sh7372 aka SH-Mobile AP4), hence drop support for it in the
loops-per-jiffy preset code.
As "div" is always 1 for supported contemporary ARM processors, we can
simplify the code:
- Absorb shmobile_setup_delay_hz(), which was always called with
mult = div = 1,
- Return earlier if the Cortex A7/A15 arch timer exists and support is
enabled.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
64 lines
1.5 KiB
C
64 lines
1.5 KiB
C
/*
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* SH-Mobile Timer
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*
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* Copyright (C) 2010 Magnus Damm
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* Copyright (C) 2002 - 2009 Paul Mundt
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; version 2 of the License.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*/
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#include <linux/platform_device.h>
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#include <linux/clocksource.h>
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#include <linux/delay.h>
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#include <linux/of_address.h>
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#include "common.h"
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void __init shmobile_init_delay(void)
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{
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struct device_node *np, *cpus;
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u32 max_freq = 0;
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cpus = of_find_node_by_path("/cpus");
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if (!cpus)
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return;
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for_each_child_of_node(cpus, np) {
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u32 freq;
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if (IS_ENABLED(CONFIG_ARM_ARCH_TIMER) &&
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(of_device_is_compatible(np, "arm,cortex-a7") ||
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of_device_is_compatible(np, "arm,cortex-a15"))) {
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of_node_put(np);
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of_node_put(cpus);
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return;
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}
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if (!of_property_read_u32(np, "clock-frequency", &freq))
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max_freq = max(max_freq, freq);
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}
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of_node_put(cpus);
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if (!max_freq)
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return;
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/*
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* Calculate a worst-case loops-per-jiffy value
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* based on maximum cpu core hz setting and the
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* __delay() implementation in arch/arm/lib/delay.S.
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*
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* This will result in a longer delay than expected
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* when the cpu core runs on lower frequencies.
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*/
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if (!preset_lpj)
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preset_lpj = max_freq / HZ;
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}
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