forked from luck/tmp_suning_uos_patched
c347b7989e
This patch adds base support for Celleb platform. Signed-off-by: Kou Ishizaki <kou.ishizaki@toshiba.co.jp> Acked-by: Arnd Bergmann <arnd.bergmann@de.ibm.com> Acked-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Signed-off-by: Paul Mackerras <paulus@samba.org>
125 lines
2.9 KiB
C
125 lines
2.9 KiB
C
/*
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* SMP support for Celleb platform. (Incomplete)
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*
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* (C) Copyright 2006 TOSHIBA CORPORATION
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*
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* This code is based on arch/powerpc/platforms/cell/smp.c:
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* Dave Engebretsen, Peter Bergner, and
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* Mike Corrigan {engebret|bergner|mikec}@us.ibm.com
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* Plus various changes from other IBM teams...
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License along
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* with this program; if not, write to the Free Software Foundation, Inc.,
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* 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
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*/
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#undef DEBUG
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#include <linux/kernel.h>
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#include <linux/smp.h>
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#include <linux/interrupt.h>
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#include <linux/init.h>
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#include <linux/threads.h>
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#include <linux/cpu.h>
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#include <asm/irq.h>
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#include <asm/smp.h>
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#include <asm/machdep.h>
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#include <asm/udbg.h>
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#include "interrupt.h"
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#ifdef DEBUG
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#define DBG(fmt...) udbg_printf(fmt)
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#else
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#define DBG(fmt...)
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#endif
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/*
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* The primary thread of each non-boot processor is recorded here before
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* smp init.
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*/
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/* static cpumask_t of_spin_map; */
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/**
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* smp_startup_cpu() - start the given cpu
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*
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* At boot time, there is nothing to do for primary threads which were
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* started from Open Firmware. For anything else, call RTAS with the
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* appropriate start location.
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*
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* Returns:
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* 0 - failure
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* 1 - success
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*/
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static inline int __devinit smp_startup_cpu(unsigned int lcpu)
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{
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return 0;
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}
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static void smp_beatic_message_pass(int target, int msg)
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{
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unsigned int i;
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if (target < NR_CPUS) {
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beatic_cause_IPI(target, msg);
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} else {
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for_each_online_cpu(i) {
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if (target == MSG_ALL_BUT_SELF
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&& i == smp_processor_id())
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continue;
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beatic_cause_IPI(i, msg);
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}
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}
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}
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static int __init smp_beatic_probe(void)
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{
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return cpus_weight(cpu_possible_map);
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}
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static void __devinit smp_beatic_setup_cpu(int cpu)
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{
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beatic_setup_cpu(cpu);
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}
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static void __devinit smp_celleb_kick_cpu(int nr)
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{
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BUG_ON(nr < 0 || nr >= NR_CPUS);
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if (!smp_startup_cpu(nr))
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return;
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}
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static int smp_celleb_cpu_bootable(unsigned int nr)
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{
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return 1;
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}
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static struct smp_ops_t bpa_beatic_smp_ops = {
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.message_pass = smp_beatic_message_pass,
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.probe = smp_beatic_probe,
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.kick_cpu = smp_celleb_kick_cpu,
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.setup_cpu = smp_beatic_setup_cpu,
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.cpu_bootable = smp_celleb_cpu_bootable,
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};
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/* This is called very early */
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void __init smp_init_celleb(void)
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{
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DBG(" -> smp_init_celleb()\n");
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smp_ops = &bpa_beatic_smp_ops;
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DBG(" <- smp_init_celleb()\n");
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}
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