forked from luck/tmp_suning_uos_patched
3ad2f3fbb9
In particular, several occurances of funny versions of 'success', 'unknown', 'therefore', 'acknowledge', 'argument', 'achieve', 'address', 'beginning', 'desirable', 'separate' and 'necessary' are fixed. Signed-off-by: Daniel Mack <daniel@caiaq.de> Cc: Joe Perches <joe@perches.com> Cc: Junio C Hamano <gitster@pobox.com> Signed-off-by: Jiri Kosina <jkosina@suse.cz>
359 lines
9.7 KiB
C
359 lines
9.7 KiB
C
#ifndef _H8300_IO_H
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#define _H8300_IO_H
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#ifdef __KERNEL__
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#include <asm/virtconvert.h>
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#if defined(CONFIG_H83007) || defined(CONFIG_H83068)
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#include <asm/regs306x.h>
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#elif defined(CONFIG_H8S2678)
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#include <asm/regs267x.h>
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#else
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#error UNKNOWN CPU TYPE
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#endif
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/*
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* These are for ISA/PCI shared memory _only_ and should never be used
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* on any other type of memory, including Zorro memory. They are meant to
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* access the bus in the bus byte order which is little-endian!.
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*
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* readX/writeX() are used to access memory mapped devices. On some
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* architectures the memory mapped IO stuff needs to be accessed
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* differently. On the m68k architecture, we just read/write the
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* memory location directly.
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*/
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/* ++roman: The assignments to temp. vars avoid that gcc sometimes generates
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* two accesses to memory, which may be undesirable for some devices.
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*/
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/*
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* swap functions are sometimes needed to interface little-endian hardware
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*/
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static inline unsigned short _swapw(volatile unsigned short v)
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{
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#ifndef H8300_IO_NOSWAP
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unsigned short r;
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__asm__("xor.b %w0,%x0\n\t"
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"xor.b %x0,%w0\n\t"
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"xor.b %w0,%x0"
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:"=r"(r)
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:"0"(v));
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return r;
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#else
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return v;
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#endif
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}
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static inline unsigned long _swapl(volatile unsigned long v)
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{
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#ifndef H8300_IO_NOSWAP
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unsigned long r;
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__asm__("xor.b %w0,%x0\n\t"
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"xor.b %x0,%w0\n\t"
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"xor.b %w0,%x0\n\t"
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"xor.w %e0,%f0\n\t"
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"xor.w %f0,%e0\n\t"
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"xor.w %e0,%f0\n\t"
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"xor.b %w0,%x0\n\t"
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"xor.b %x0,%w0\n\t"
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"xor.b %w0,%x0"
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:"=r"(r)
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:"0"(v));
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return r;
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#else
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return v;
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#endif
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}
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#define readb(addr) \
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({ unsigned char __v = \
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*(volatile unsigned char *)((unsigned long)(addr) & 0x00ffffff); \
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__v; })
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#define readw(addr) \
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({ unsigned short __v = \
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*(volatile unsigned short *)((unsigned long)(addr) & 0x00ffffff); \
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__v; })
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#define readl(addr) \
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({ unsigned long __v = \
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*(volatile unsigned long *)((unsigned long)(addr) & 0x00ffffff); \
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__v; })
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#define writeb(b,addr) (void)((*(volatile unsigned char *) \
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((unsigned long)(addr) & 0x00ffffff)) = (b))
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#define writew(b,addr) (void)((*(volatile unsigned short *) \
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((unsigned long)(addr) & 0x00ffffff)) = (b))
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#define writel(b,addr) (void)((*(volatile unsigned long *) \
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((unsigned long)(addr) & 0x00ffffff)) = (b))
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#define readb_relaxed(addr) readb(addr)
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#define readw_relaxed(addr) readw(addr)
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#define readl_relaxed(addr) readl(addr)
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#define __raw_readb readb
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#define __raw_readw readw
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#define __raw_readl readl
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#define __raw_writeb writeb
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#define __raw_writew writew
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#define __raw_writel writel
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static inline int h8300_buswidth(unsigned int addr)
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{
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return (*(volatile unsigned char *)ABWCR & (1 << ((addr >> 21) & 7))) == 0;
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}
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static inline void io_outsb(unsigned int addr, const void *buf, int len)
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{
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volatile unsigned char *ap_b = (volatile unsigned char *) addr;
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volatile unsigned short *ap_w = (volatile unsigned short *) addr;
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unsigned char *bp = (unsigned char *) buf;
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if(h8300_buswidth(addr) && (addr & 1)) {
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while (len--)
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*ap_w = *bp++;
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} else {
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while (len--)
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*ap_b = *bp++;
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}
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}
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static inline void io_outsw(unsigned int addr, const void *buf, int len)
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{
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volatile unsigned short *ap = (volatile unsigned short *) addr;
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unsigned short *bp = (unsigned short *) buf;
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while (len--)
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*ap = _swapw(*bp++);
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}
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static inline void io_outsl(unsigned int addr, const void *buf, int len)
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{
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volatile unsigned long *ap = (volatile unsigned long *) addr;
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unsigned long *bp = (unsigned long *) buf;
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while (len--)
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*ap = _swapl(*bp++);
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}
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static inline void io_outsw_noswap(unsigned int addr, const void *buf, int len)
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{
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volatile unsigned short *ap = (volatile unsigned short *) addr;
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unsigned short *bp = (unsigned short *) buf;
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while (len--)
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*ap = *bp++;
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}
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static inline void io_outsl_noswap(unsigned int addr, const void *buf, int len)
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{
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volatile unsigned long *ap = (volatile unsigned long *) addr;
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unsigned long *bp = (unsigned long *) buf;
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while (len--)
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*ap = *bp++;
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}
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static inline void io_insb(unsigned int addr, void *buf, int len)
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{
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volatile unsigned char *ap_b;
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volatile unsigned short *ap_w;
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unsigned char *bp = (unsigned char *) buf;
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if(h8300_buswidth(addr)) {
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ap_w = (volatile unsigned short *)(addr & ~1);
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while (len--)
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*bp++ = *ap_w & 0xff;
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} else {
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ap_b = (volatile unsigned char *)addr;
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while (len--)
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*bp++ = *ap_b;
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}
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}
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static inline void io_insw(unsigned int addr, void *buf, int len)
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{
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volatile unsigned short *ap = (volatile unsigned short *) addr;
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unsigned short *bp = (unsigned short *) buf;
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while (len--)
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*bp++ = _swapw(*ap);
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}
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static inline void io_insl(unsigned int addr, void *buf, int len)
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{
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volatile unsigned long *ap = (volatile unsigned long *) addr;
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unsigned long *bp = (unsigned long *) buf;
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while (len--)
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*bp++ = _swapl(*ap);
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}
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static inline void io_insw_noswap(unsigned int addr, void *buf, int len)
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{
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volatile unsigned short *ap = (volatile unsigned short *) addr;
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unsigned short *bp = (unsigned short *) buf;
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while (len--)
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*bp++ = *ap;
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}
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static inline void io_insl_noswap(unsigned int addr, void *buf, int len)
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{
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volatile unsigned long *ap = (volatile unsigned long *) addr;
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unsigned long *bp = (unsigned long *) buf;
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while (len--)
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*bp++ = *ap;
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}
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/*
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* make the short names macros so specific devices
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* can override them as required
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*/
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#define memset_io(a,b,c) memset((void *)(a),(b),(c))
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#define memcpy_fromio(a,b,c) memcpy((a),(void *)(b),(c))
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#define memcpy_toio(a,b,c) memcpy((void *)(a),(b),(c))
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#define mmiowb()
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#define inb(addr) ((h8300_buswidth(addr))?readw((addr) & ~1) & 0xff:readb(addr))
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#define inw(addr) _swapw(readw(addr))
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#define inl(addr) _swapl(readl(addr))
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#define outb(x,addr) ((void)((h8300_buswidth(addr) && \
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((addr) & 1))?writew(x,(addr) & ~1):writeb(x,addr)))
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#define outw(x,addr) ((void) writew(_swapw(x),addr))
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#define outl(x,addr) ((void) writel(_swapl(x),addr))
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#define inb_p(addr) inb(addr)
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#define inw_p(addr) inw(addr)
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#define inl_p(addr) inl(addr)
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#define outb_p(x,addr) outb(x,addr)
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#define outw_p(x,addr) outw(x,addr)
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#define outl_p(x,addr) outl(x,addr)
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#define outsb(a,b,l) io_outsb(a,b,l)
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#define outsw(a,b,l) io_outsw(a,b,l)
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#define outsl(a,b,l) io_outsl(a,b,l)
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#define insb(a,b,l) io_insb(a,b,l)
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#define insw(a,b,l) io_insw(a,b,l)
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#define insl(a,b,l) io_insl(a,b,l)
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#define IO_SPACE_LIMIT 0xffffff
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/* Values for nocacheflag and cmode */
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#define IOMAP_FULL_CACHING 0
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#define IOMAP_NOCACHE_SER 1
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#define IOMAP_NOCACHE_NONSER 2
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#define IOMAP_WRITETHROUGH 3
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extern void *__ioremap(unsigned long physaddr, unsigned long size, int cacheflag);
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extern void __iounmap(void *addr, unsigned long size);
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static inline void *ioremap(unsigned long physaddr, unsigned long size)
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{
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return __ioremap(physaddr, size, IOMAP_NOCACHE_SER);
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}
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static inline void *ioremap_nocache(unsigned long physaddr, unsigned long size)
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{
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return __ioremap(physaddr, size, IOMAP_NOCACHE_SER);
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}
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static inline void *ioremap_writethrough(unsigned long physaddr, unsigned long size)
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{
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return __ioremap(physaddr, size, IOMAP_WRITETHROUGH);
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}
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static inline void *ioremap_fullcache(unsigned long physaddr, unsigned long size)
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{
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return __ioremap(physaddr, size, IOMAP_FULL_CACHING);
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}
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extern void iounmap(void *addr);
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/* H8/300 internal I/O functions */
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static __inline__ unsigned char ctrl_inb(unsigned long addr)
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{
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return *(volatile unsigned char*)addr;
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}
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static __inline__ unsigned short ctrl_inw(unsigned long addr)
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{
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return *(volatile unsigned short*)addr;
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}
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static __inline__ unsigned long ctrl_inl(unsigned long addr)
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{
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return *(volatile unsigned long*)addr;
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}
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static __inline__ void ctrl_outb(unsigned char b, unsigned long addr)
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{
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*(volatile unsigned char*)addr = b;
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}
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static __inline__ void ctrl_outw(unsigned short b, unsigned long addr)
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{
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*(volatile unsigned short*)addr = b;
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}
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static __inline__ void ctrl_outl(unsigned long b, unsigned long addr)
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{
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*(volatile unsigned long*)addr = b;
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}
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static __inline__ void ctrl_bclr(int b, unsigned long addr)
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{
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if (__builtin_constant_p(b))
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switch (b) {
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case 0: __asm__("bclr #0,@%0"::"r"(addr)); break;
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case 1: __asm__("bclr #1,@%0"::"r"(addr)); break;
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case 2: __asm__("bclr #2,@%0"::"r"(addr)); break;
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case 3: __asm__("bclr #3,@%0"::"r"(addr)); break;
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case 4: __asm__("bclr #4,@%0"::"r"(addr)); break;
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case 5: __asm__("bclr #5,@%0"::"r"(addr)); break;
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case 6: __asm__("bclr #6,@%0"::"r"(addr)); break;
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case 7: __asm__("bclr #7,@%0"::"r"(addr)); break;
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}
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else
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__asm__("bclr %w0,@%1"::"r"(b), "r"(addr));
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}
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static __inline__ void ctrl_bset(int b, unsigned long addr)
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{
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if (__builtin_constant_p(b))
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switch (b) {
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case 0: __asm__("bset #0,@%0"::"r"(addr)); break;
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case 1: __asm__("bset #1,@%0"::"r"(addr)); break;
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case 2: __asm__("bset #2,@%0"::"r"(addr)); break;
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case 3: __asm__("bset #3,@%0"::"r"(addr)); break;
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case 4: __asm__("bset #4,@%0"::"r"(addr)); break;
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case 5: __asm__("bset #5,@%0"::"r"(addr)); break;
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case 6: __asm__("bset #6,@%0"::"r"(addr)); break;
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case 7: __asm__("bset #7,@%0"::"r"(addr)); break;
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}
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else
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__asm__("bset %w0,@%1"::"r"(b), "r"(addr));
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}
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/* Pages to physical address... */
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#define page_to_phys(page) ((page - mem_map) << PAGE_SHIFT)
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#define page_to_bus(page) ((page - mem_map) << PAGE_SHIFT)
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/*
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* Macros used for converting between virtual and physical mappings.
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*/
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#define phys_to_virt(vaddr) ((void *) (vaddr))
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#define virt_to_phys(vaddr) ((unsigned long) (vaddr))
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#define virt_to_bus virt_to_phys
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#define bus_to_virt phys_to_virt
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/*
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* Convert a physical pointer to a virtual kernel pointer for /dev/mem
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* access
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*/
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#define xlate_dev_mem_ptr(p) __va(p)
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/*
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* Convert a virtual cached pointer to an uncached pointer
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*/
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#define xlate_dev_kmem_ptr(p) p
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#endif /* __KERNEL__ */
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#endif /* _H8300_IO_H */
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