forked from luck/tmp_suning_uos_patched
3d5a44be30
Add core definitions and memory map, gpio, irq, iomux, uart device support. Signed-off-by: Richard Zhao <richard.zhao@freescale.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
62 lines
1.9 KiB
C
62 lines
1.9 KiB
C
/*
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* Copyright 2004-2007 Freescale Semiconductor, Inc. All Rights Reserved.
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*/
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/*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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#ifndef __ASM_ARCH_MXC_MEMORY_H__
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#define __ASM_ARCH_MXC_MEMORY_H__
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#define MX1_PHYS_OFFSET UL(0x08000000)
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#define MX21_PHYS_OFFSET UL(0xc0000000)
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#define MX25_PHYS_OFFSET UL(0x80000000)
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#define MX27_PHYS_OFFSET UL(0xa0000000)
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#define MX3x_PHYS_OFFSET UL(0x80000000)
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#define MX50_PHYS_OFFSET UL(0x70000000)
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#define MX51_PHYS_OFFSET UL(0x90000000)
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#define MX53_PHYS_OFFSET UL(0x70000000)
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#define MXC91231_PHYS_OFFSET UL(0x90000000)
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#if !defined(CONFIG_RUNTIME_PHYS_OFFSET)
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# if defined CONFIG_ARCH_MX1
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# define PHYS_OFFSET MX1_PHYS_OFFSET
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# elif defined CONFIG_MACH_MX21
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# define PHYS_OFFSET MX21_PHYS_OFFSET
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# elif defined CONFIG_ARCH_MX25
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# define PHYS_OFFSET MX25_PHYS_OFFSET
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# elif defined CONFIG_MACH_MX27
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# define PHYS_OFFSET MX27_PHYS_OFFSET
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# elif defined CONFIG_ARCH_MX3
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# define PHYS_OFFSET MX3x_PHYS_OFFSET
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# elif defined CONFIG_ARCH_MXC91231
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# define PHYS_OFFSET MXC91231_PHYS_OFFSET
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# elif defined CONFIG_ARCH_MX50
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# define PHYS_OFFSET MX50_PHYS_OFFSET
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# elif defined CONFIG_ARCH_MX51
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# define PHYS_OFFSET MX51_PHYS_OFFSET
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# elif defined CONFIG_ARCH_MX53
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# define PHYS_OFFSET MX53_PHYS_OFFSET
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# endif
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#endif
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#if defined(CONFIG_MX3_VIDEO)
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/*
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* Increase size of DMA-consistent memory region.
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* This is required for mx3 camera driver to capture at least two QXGA frames.
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*/
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#define CONSISTENT_DMA_SIZE SZ_8M
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#elif defined(CONFIG_MX1_VIDEO) || defined(CONFIG_VIDEO_MX2_HOSTSUPPORT)
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/*
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* Increase size of DMA-consistent memory region.
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* This is required for i.MX camera driver to capture at least four VGA frames.
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*/
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#define CONSISTENT_DMA_SIZE SZ_4M
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#endif /* CONFIG_MX1_VIDEO || CONFIG_VIDEO_MX2_HOSTSUPPORT */
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#endif /* __ASM_ARCH_MXC_MEMORY_H__ */
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