forked from luck/tmp_suning_uos_patched
15ec446119
We now: * check for a v3 controller before setting 8-bit bus width * offer a callback for platform code to switch to 8-bit mode, which allows non-v3 controllers to support it * rely on mmc->caps |= MMC_CAP_8_BIT_DATA; in platform code to specify that the board designers have indeed brought out all the pins for 8-bit to the slot. We were previously relying only on whether the *controller* supported 8-bit, which doesn't tell us anything about the pin configuration in the board design. This fixes the MMC card regression reported by Maxim Levitsky here: http://thread.gmane.org/gmane.linux.kernel.mmc/4336 by no longer assuming that 8-bit works by default. Signed-off-by: Philip Rakity <prakity@marvell.com> Tested-by: Giuseppe Cavallaro <peppe.cavallaro@st.com> Signed-off-by: Chris Ball <cjb@laptop.org>
36 lines
957 B
C
36 lines
957 B
C
/* linux/arch/arm/plat-pxa/include/plat/sdhci.h
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*
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* Copyright 2010 Marvell
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* Zhangfei Gao <zhangfei.gao@marvell.com>
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*
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* PXA Platform - SDHCI platform data definitions
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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#ifndef __PLAT_PXA_SDHCI_H
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#define __PLAT_PXA_SDHCI_H
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/* pxa specific flag */
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/* Require clock free running */
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#define PXA_FLAG_DISABLE_CLOCK_GATING (1<<0)
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/* Board design supports 8-bit data on SD/SDIO BUS */
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#define PXA_FLAG_SD_8_BIT_CAPABLE_SLOT (1<<2)
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/*
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* struct pxa_sdhci_platdata() - Platform device data for PXA SDHCI
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* @max_speed: the maximum speed supported
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* @quirks: quirks of specific device
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* @flags: flags for platform requirement
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*/
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struct sdhci_pxa_platdata {
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unsigned int max_speed;
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unsigned int quirks;
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unsigned int flags;
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};
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#endif /* __PLAT_PXA_SDHCI_H */
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