Len Brown e651262477 tools/power turbostat: further decode MSR_IA32_MISC_ENABLE ... Decode MISC_ENABLE.NO_TURBO, also use the #defines in msr-index.h for decoding this register cpu0: MSR_IA32_MISC_ENABLE: 0x00850089 (TCC EIST MWAIT TURBO) Although it is not architectural, decode also MSR_IA32_MISC_ENABLE.prefetch-disable (bit-9). documented to be present on: Core, P4, Intel-Xeon reserved on: Atom, Silvermont, Nehalem, SNB, PHI ec. Signed-off-by: Len Brown <len.brown@intel.com>		2017-03-01 00:14:03 -05:00
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acpi	Merge branch 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/jikos/trivial	2016-12-14 11:12:25 -08:00
cpupower	Merge branch 'kbuild' of git://git.kernel.org/pub/scm/linux/kernel/git/mmarek/kbuild	2016-12-17 16:24:13 -08:00
x86	tools/power turbostat: further decode MSR_IA32_MISC_ENABLE	2017-03-01 00:14:03 -05:00