forked from luck/tmp_suning_uos_patched
66314223aa
Adding core definitions for Altera's SOCFPGA ARM platform. Mininum support for Altera's SOCFPGA Cyclone 5 hardware. Signed-off-by: Dinh Nguyen <dinguyen@altera.com> Reviewed-by: Pavel Machek <pavel@denx.de> Reviewed-by: Rob Herring <rob.herring@calxeda.com> Reviewed-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> Signed-off-by: Arnd Bergmann <arnd@arndb.de>
63 lines
1.7 KiB
C
63 lines
1.7 KiB
C
/*
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* Copyright (C) 2012 Altera Corporation
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program. If not, see <http://www.gnu.org/licenses/>.
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*/
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#include <linux/dw_apb_timer.h>
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#include <linux/of_irq.h>
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#include <linux/of_platform.h>
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#include <asm/hardware/cache-l2x0.h>
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#include <asm/hardware/gic.h>
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#include <asm/mach/arch.h>
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extern void socfpga_init_clocks(void);
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const static struct of_device_id irq_match[] = {
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{ .compatible = "arm,cortex-a9-gic", .data = gic_of_init, },
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{}
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};
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static void __init gic_init_irq(void)
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{
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of_irq_init(irq_match);
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}
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static void socfpga_cyclone5_restart(char mode, const char *cmd)
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{
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/* TODO: */
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}
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static void __init socfpga_cyclone5_init(void)
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{
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l2x0_of_init(0, ~0UL);
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of_platform_populate(NULL, of_default_bus_match_table, NULL, NULL);
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socfpga_init_clocks();
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}
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static const char *altera_dt_match[] = {
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"altr,socfpga",
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"altr,socfpga-cyclone5",
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NULL
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};
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DT_MACHINE_START(SOCFPGA, "Altera SOCFPGA")
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.init_irq = gic_init_irq,
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.handle_irq = gic_handle_irq,
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.timer = &dw_apb_timer,
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.init_machine = socfpga_cyclone5_init,
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.restart = socfpga_cyclone5_restart,
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.dt_compat = altera_dt_match,
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MACHINE_END
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