forked from luck/tmp_suning_uos_patched
c140d87995
Disintegrate asm/system.h for IA64. Signed-off-by: David Howells <dhowells@redhat.com> Acked-by: Tony Luck <tony.luck@intel.com> cc: linux-ia64@vger.kernel.org
69 lines
2.3 KiB
C
69 lines
2.3 KiB
C
/*
|
|
* Memory barrier definitions. This is based on information published
|
|
* in the Processor Abstraction Layer and the System Abstraction Layer
|
|
* manual.
|
|
*
|
|
* Copyright (C) 1998-2003 Hewlett-Packard Co
|
|
* David Mosberger-Tang <davidm@hpl.hp.com>
|
|
* Copyright (C) 1999 Asit Mallick <asit.k.mallick@intel.com>
|
|
* Copyright (C) 1999 Don Dugger <don.dugger@intel.com>
|
|
*/
|
|
#ifndef _ASM_IA64_BARRIER_H
|
|
#define _ASM_IA64_BARRIER_H
|
|
|
|
#include <linux/compiler.h>
|
|
|
|
/*
|
|
* Macros to force memory ordering. In these descriptions, "previous"
|
|
* and "subsequent" refer to program order; "visible" means that all
|
|
* architecturally visible effects of a memory access have occurred
|
|
* (at a minimum, this means the memory has been read or written).
|
|
*
|
|
* wmb(): Guarantees that all preceding stores to memory-
|
|
* like regions are visible before any subsequent
|
|
* stores and that all following stores will be
|
|
* visible only after all previous stores.
|
|
* rmb(): Like wmb(), but for reads.
|
|
* mb(): wmb()/rmb() combo, i.e., all previous memory
|
|
* accesses are visible before all subsequent
|
|
* accesses and vice versa. This is also known as
|
|
* a "fence."
|
|
*
|
|
* Note: "mb()" and its variants cannot be used as a fence to order
|
|
* accesses to memory mapped I/O registers. For that, mf.a needs to
|
|
* be used. However, we don't want to always use mf.a because (a)
|
|
* it's (presumably) much slower than mf and (b) mf.a is supported for
|
|
* sequential memory pages only.
|
|
*/
|
|
#define mb() ia64_mf()
|
|
#define rmb() mb()
|
|
#define wmb() mb()
|
|
#define read_barrier_depends() do { } while(0)
|
|
|
|
#ifdef CONFIG_SMP
|
|
# define smp_mb() mb()
|
|
# define smp_rmb() rmb()
|
|
# define smp_wmb() wmb()
|
|
# define smp_read_barrier_depends() read_barrier_depends()
|
|
#else
|
|
# define smp_mb() barrier()
|
|
# define smp_rmb() barrier()
|
|
# define smp_wmb() barrier()
|
|
# define smp_read_barrier_depends() do { } while(0)
|
|
#endif
|
|
|
|
/*
|
|
* XXX check on this ---I suspect what Linus really wants here is
|
|
* acquire vs release semantics but we can't discuss this stuff with
|
|
* Linus just yet. Grrr...
|
|
*/
|
|
#define set_mb(var, value) do { (var) = (value); mb(); } while (0)
|
|
|
|
/*
|
|
* The group barrier in front of the rsm & ssm are necessary to ensure
|
|
* that none of the previous instructions in the same group are
|
|
* affected by the rsm/ssm.
|
|
*/
|
|
|
|
#endif /* _ASM_IA64_BARRIER_H */
|