forked from luck/tmp_suning_uos_patched
ed96762e32
Currently, GIC IDs are hardcoded making the code dependent on the 4+4 b.L configuration. Let's allow for GIC IDs to be discovered upon switcher initialization to support other b.L configurations such as the 1+1 one, or 2+3 as on the VExpress TC2. Signed-off-by: Nicolas Pitre <nico@linaro.org>
398 lines
9.8 KiB
C
398 lines
9.8 KiB
C
/*
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* arch/arm/common/bL_switcher.c -- big.LITTLE cluster switcher core driver
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*
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* Created by: Nicolas Pitre, March 2012
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* Copyright: (C) 2012-2013 Linaro Limited
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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#include <linux/init.h>
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#include <linux/kernel.h>
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#include <linux/module.h>
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#include <linux/sched.h>
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#include <linux/interrupt.h>
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#include <linux/cpu_pm.h>
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#include <linux/cpu.h>
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#include <linux/cpumask.h>
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#include <linux/kthread.h>
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#include <linux/wait.h>
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#include <linux/clockchips.h>
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#include <linux/hrtimer.h>
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#include <linux/tick.h>
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#include <linux/mm.h>
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#include <linux/string.h>
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#include <linux/irqchip/arm-gic.h>
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#include <asm/smp_plat.h>
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#include <asm/suspend.h>
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#include <asm/mcpm.h>
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#include <asm/bL_switcher.h>
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/*
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* Use our own MPIDR accessors as the generic ones in asm/cputype.h have
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* __attribute_const__ and we don't want the compiler to assume any
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* constness here as the value _does_ change along some code paths.
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*/
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static int read_mpidr(void)
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{
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unsigned int id;
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asm volatile ("mrc p15, 0, %0, c0, c0, 5" : "=r" (id));
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return id & MPIDR_HWID_BITMASK;
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}
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/*
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* bL switcher core code.
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*/
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static void bL_do_switch(void *_unused)
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{
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unsigned mpidr, cpuid, clusterid, ob_cluster, ib_cluster;
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pr_debug("%s\n", __func__);
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mpidr = read_mpidr();
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cpuid = MPIDR_AFFINITY_LEVEL(mpidr, 0);
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clusterid = MPIDR_AFFINITY_LEVEL(mpidr, 1);
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ob_cluster = clusterid;
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ib_cluster = clusterid ^ 1;
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/*
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* Our state has been saved at this point. Let's release our
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* inbound CPU.
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*/
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mcpm_set_entry_vector(cpuid, ib_cluster, cpu_resume);
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sev();
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/*
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* From this point, we must assume that our counterpart CPU might
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* have taken over in its parallel world already, as if execution
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* just returned from cpu_suspend(). It is therefore important to
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* be very careful not to make any change the other guy is not
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* expecting. This is why we need stack isolation.
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*
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* Fancy under cover tasks could be performed here. For now
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* we have none.
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*/
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/* Let's put ourself down. */
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mcpm_cpu_power_down();
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/* should never get here */
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BUG();
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}
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/*
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* Stack isolation. To ensure 'current' remains valid, we just use another
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* piece of our thread's stack space which should be fairly lightly used.
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* The selected area starts just above the thread_info structure located
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* at the very bottom of the stack, aligned to a cache line, and indexed
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* with the cluster number.
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*/
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#define STACK_SIZE 512
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extern void call_with_stack(void (*fn)(void *), void *arg, void *sp);
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static int bL_switchpoint(unsigned long _arg)
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{
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unsigned int mpidr = read_mpidr();
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unsigned int clusterid = MPIDR_AFFINITY_LEVEL(mpidr, 1);
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void *stack = current_thread_info() + 1;
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stack = PTR_ALIGN(stack, L1_CACHE_BYTES);
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stack += clusterid * STACK_SIZE + STACK_SIZE;
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call_with_stack(bL_do_switch, (void *)_arg, stack);
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BUG();
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}
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/*
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* Generic switcher interface
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*/
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static unsigned int bL_gic_id[MAX_CPUS_PER_CLUSTER][MAX_NR_CLUSTERS];
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/*
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* bL_switch_to - Switch to a specific cluster for the current CPU
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* @new_cluster_id: the ID of the cluster to switch to.
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*
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* This function must be called on the CPU to be switched.
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* Returns 0 on success, else a negative status code.
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*/
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static int bL_switch_to(unsigned int new_cluster_id)
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{
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unsigned int mpidr, cpuid, clusterid, ob_cluster, ib_cluster, this_cpu;
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struct tick_device *tdev;
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enum clock_event_mode tdev_mode;
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int ret;
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mpidr = read_mpidr();
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cpuid = MPIDR_AFFINITY_LEVEL(mpidr, 0);
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clusterid = MPIDR_AFFINITY_LEVEL(mpidr, 1);
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ob_cluster = clusterid;
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ib_cluster = clusterid ^ 1;
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if (new_cluster_id == clusterid)
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return 0;
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pr_debug("before switch: CPU %d in cluster %d\n", cpuid, clusterid);
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/* Close the gate for our entry vectors */
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mcpm_set_entry_vector(cpuid, ob_cluster, NULL);
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mcpm_set_entry_vector(cpuid, ib_cluster, NULL);
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/*
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* Let's wake up the inbound CPU now in case it requires some delay
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* to come online, but leave it gated in our entry vector code.
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*/
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ret = mcpm_cpu_power_up(cpuid, ib_cluster);
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if (ret) {
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pr_err("%s: mcpm_cpu_power_up() returned %d\n", __func__, ret);
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return ret;
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}
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/*
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* From this point we are entering the switch critical zone
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* and can't take any interrupts anymore.
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*/
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local_irq_disable();
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local_fiq_disable();
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this_cpu = smp_processor_id();
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/* redirect GIC's SGIs to our counterpart */
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gic_migrate_target(bL_gic_id[cpuid][ib_cluster]);
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/*
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* Raise a SGI on the inbound CPU to make sure it doesn't stall
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* in a possible WFI, such as in mcpm_power_down().
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*/
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arch_send_wakeup_ipi_mask(cpumask_of(this_cpu));
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tdev = tick_get_device(this_cpu);
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if (tdev && !cpumask_equal(tdev->evtdev->cpumask, cpumask_of(this_cpu)))
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tdev = NULL;
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if (tdev) {
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tdev_mode = tdev->evtdev->mode;
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clockevents_set_mode(tdev->evtdev, CLOCK_EVT_MODE_SHUTDOWN);
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}
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ret = cpu_pm_enter();
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/* we can not tolerate errors at this point */
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if (ret)
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panic("%s: cpu_pm_enter() returned %d\n", __func__, ret);
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/* Flip the cluster in the CPU logical map for this CPU. */
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cpu_logical_map(this_cpu) ^= (1 << 8);
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/* Let's do the actual CPU switch. */
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ret = cpu_suspend(0, bL_switchpoint);
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if (ret > 0)
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panic("%s: cpu_suspend() returned %d\n", __func__, ret);
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/* We are executing on the inbound CPU at this point */
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mpidr = read_mpidr();
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cpuid = MPIDR_AFFINITY_LEVEL(mpidr, 0);
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clusterid = MPIDR_AFFINITY_LEVEL(mpidr, 1);
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pr_debug("after switch: CPU %d in cluster %d\n", cpuid, clusterid);
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BUG_ON(clusterid != ib_cluster);
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mcpm_cpu_powered_up();
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ret = cpu_pm_exit();
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if (tdev) {
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clockevents_set_mode(tdev->evtdev, tdev_mode);
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clockevents_program_event(tdev->evtdev,
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tdev->evtdev->next_event, 1);
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}
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local_fiq_enable();
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local_irq_enable();
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if (ret)
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pr_err("%s exiting with error %d\n", __func__, ret);
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return ret;
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}
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struct bL_thread {
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struct task_struct *task;
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wait_queue_head_t wq;
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int wanted_cluster;
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};
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static struct bL_thread bL_threads[NR_CPUS];
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static int bL_switcher_thread(void *arg)
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{
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struct bL_thread *t = arg;
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struct sched_param param = { .sched_priority = 1 };
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int cluster;
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sched_setscheduler_nocheck(current, SCHED_FIFO, ¶m);
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do {
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if (signal_pending(current))
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flush_signals(current);
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wait_event_interruptible(t->wq,
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t->wanted_cluster != -1 ||
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kthread_should_stop());
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cluster = xchg(&t->wanted_cluster, -1);
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if (cluster != -1)
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bL_switch_to(cluster);
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} while (!kthread_should_stop());
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return 0;
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}
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static struct task_struct * __init bL_switcher_thread_create(int cpu, void *arg)
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{
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struct task_struct *task;
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task = kthread_create_on_node(bL_switcher_thread, arg,
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cpu_to_node(cpu), "kswitcher_%d", cpu);
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if (!IS_ERR(task)) {
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kthread_bind(task, cpu);
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wake_up_process(task);
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} else
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pr_err("%s failed for CPU %d\n", __func__, cpu);
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return task;
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}
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/*
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* bL_switch_request - Switch to a specific cluster for the given CPU
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*
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* @cpu: the CPU to switch
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* @new_cluster_id: the ID of the cluster to switch to.
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*
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* This function causes a cluster switch on the given CPU by waking up
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* the appropriate switcher thread. This function may or may not return
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* before the switch has occurred.
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*/
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int bL_switch_request(unsigned int cpu, unsigned int new_cluster_id)
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{
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struct bL_thread *t;
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if (cpu >= ARRAY_SIZE(bL_threads)) {
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pr_err("%s: cpu %d out of bounds\n", __func__, cpu);
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return -EINVAL;
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}
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t = &bL_threads[cpu];
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if (IS_ERR(t->task))
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return PTR_ERR(t->task);
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if (!t->task)
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return -ESRCH;
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t->wanted_cluster = new_cluster_id;
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wake_up(&t->wq);
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return 0;
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}
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EXPORT_SYMBOL_GPL(bL_switch_request);
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/*
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* Activation and configuration code.
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*/
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static cpumask_t bL_switcher_removed_logical_cpus;
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static void __init bL_switcher_restore_cpus(void)
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{
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int i;
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for_each_cpu(i, &bL_switcher_removed_logical_cpus)
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cpu_up(i);
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}
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static int __init bL_switcher_halve_cpus(void)
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{
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int cpu, cluster, i, ret;
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cpumask_t cluster_mask[2], common_mask;
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cpumask_clear(&bL_switcher_removed_logical_cpus);
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cpumask_clear(&cluster_mask[0]);
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cpumask_clear(&cluster_mask[1]);
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for_each_online_cpu(i) {
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cpu = cpu_logical_map(i) & 0xff;
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cluster = (cpu_logical_map(i) >> 8) & 0xff;
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if (cluster >= 2) {
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pr_err("%s: only dual cluster systems are supported\n", __func__);
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return -EINVAL;
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}
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cpumask_set_cpu(cpu, &cluster_mask[cluster]);
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}
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if (!cpumask_and(&common_mask, &cluster_mask[0], &cluster_mask[1])) {
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pr_err("%s: no common set of CPUs\n", __func__);
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return -EINVAL;
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}
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for_each_online_cpu(i) {
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cpu = cpu_logical_map(i) & 0xff;
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cluster = (cpu_logical_map(i) >> 8) & 0xff;
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if (cpumask_test_cpu(cpu, &common_mask)) {
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/* Let's take note of the GIC ID for this CPU */
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int gic_id = gic_get_cpu_id(i);
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if (gic_id < 0) {
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pr_err("%s: bad GIC ID for CPU %d\n", __func__, i);
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return -EINVAL;
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}
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bL_gic_id[cpu][cluster] = gic_id;
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pr_info("GIC ID for CPU %u cluster %u is %u\n",
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cpu, cluster, gic_id);
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/*
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* We keep only those logical CPUs which number
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* is equal to their physical CPU number. This is
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* not perfect but good enough for now.
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*/
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if (cpu == i)
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continue;
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}
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ret = cpu_down(i);
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if (ret) {
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bL_switcher_restore_cpus();
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return ret;
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}
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cpumask_set_cpu(i, &bL_switcher_removed_logical_cpus);
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}
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return 0;
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}
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static int __init bL_switcher_init(void)
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{
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int cpu, ret;
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pr_info("big.LITTLE switcher initializing\n");
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if (MAX_NR_CLUSTERS != 2) {
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pr_err("%s: only dual cluster systems are supported\n", __func__);
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return -EINVAL;
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}
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cpu_hotplug_driver_lock();
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ret = bL_switcher_halve_cpus();
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if (ret) {
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cpu_hotplug_driver_unlock();
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return ret;
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}
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for_each_online_cpu(cpu) {
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struct bL_thread *t = &bL_threads[cpu];
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init_waitqueue_head(&t->wq);
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t->wanted_cluster = -1;
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t->task = bL_switcher_thread_create(cpu, t);
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}
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cpu_hotplug_driver_unlock();
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pr_info("big.LITTLE switcher initialized\n");
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return 0;
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}
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late_initcall(bL_switcher_init);
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