forked from luck/tmp_suning_uos_patched
54b6a1bd53
Intel AES-NI is a new set of Single Instruction Multiple Data (SIMD) instructions that are going to be introduced in the next generation of Intel processor, as of 2009. These instructions enable fast and secure data encryption and decryption, using the Advanced Encryption Standard (AES), defined by FIPS Publication number 197. The architecture introduces six instructions that offer full hardware support for AES. Four of them support high performance data encryption and decryption, and the other two instructions support the AES key expansion procedure. The white paper can be downloaded from: http://softwarecommunity.intel.com/isn/downloads/intelavx/AES-Instructions-Set_WP.pdf AES may be used in soft_irq context, but MMX/SSE context can not be touched safely in soft_irq context. So in_interrupt() is checked, if in IRQ or soft_irq context, the general x86_64 implementation are used instead. Signed-off-by: Huang Ying <ying.huang@intel.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au> |
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| .. | ||
| aes_glue.c | ||
| aes-i586-asm_32.S | ||
| aes-x86_64-asm_64.S | ||
| aesni-intel_asm.S | ||
| aesni-intel_glue.c | ||
| crc32c-intel.c | ||
| Makefile | ||
| salsa20_glue.c | ||
| salsa20-i586-asm_32.S | ||
| salsa20-x86_64-asm_64.S | ||
| twofish_glue.c | ||
| twofish-i586-asm_32.S | ||
| twofish-x86_64-asm_64.S | ||