forked from luck/tmp_suning_uos_patched
4ee437fbf6
The fsl_ssi fifo watermark is by default set to 2 free spaces (i.e. activate DMA on FIFO when only 2 spaces are left.) This means the DMA must service the fifo within 2 audio samples, which is just not enough time for many use cases with high data rate. In many configurations the audio channel slips (causing l/r swap in stereo configurations, or channel slipping in multi-channel configurations). This patch gives more breathing room and allows the SSI to operate reliably by changing the fifio refill watermark to 8. There is no change in behavior for older chips (with an 8-deep fifo). Only the newer chips with a 15-deep fifo get the new behavior. I suspect a new fifo depth setting could be optimized on the older chips too, but I have not tested. Signed-off-by: Caleb Crome <caleb@crome.org> Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com> Signed-off-by: Mark Brown <broonie@kernel.org> |
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efika-audio-fabric.c | ||
eukrea-tlv320.c | ||
fsl_asrc_dma.c | ||
fsl_asrc.c | ||
fsl_asrc.h | ||
fsl_dma.c | ||
fsl_dma.h | ||
fsl_esai.c | ||
fsl_esai.h | ||
fsl_sai.c | ||
fsl_sai.h | ||
fsl_spdif.c | ||
fsl_spdif.h | ||
fsl_ssi_dbg.c | ||
fsl_ssi.c | ||
fsl_ssi.h | ||
fsl_utils.c | ||
fsl_utils.h | ||
fsl-asoc-card.c | ||
imx-audmux.c | ||
imx-audmux.h | ||
imx-es8328.c | ||
imx-mc13783.c | ||
imx-pcm-dma.c | ||
imx-pcm-fiq.c | ||
imx-pcm.h | ||
imx-sgtl5000.c | ||
imx-spdif.c | ||
imx-ssi.c | ||
imx-ssi.h | ||
imx-wm8962.c | ||
Kconfig | ||
Makefile | ||
mpc5200_dma.c | ||
mpc5200_dma.h | ||
mpc5200_psc_ac97.c | ||
mpc5200_psc_ac97.h | ||
mpc5200_psc_i2s.c | ||
mpc8610_hpcd.c | ||
mx27vis-aic32x4.c | ||
p1022_ds.c | ||
p1022_rdk.c | ||
pcm030-audio-fabric.c | ||
phycore-ac97.c | ||
wm1133-ev1.c |