forked from luck/tmp_suning_uos_patched
67f854b910
This patch provides a option for users to enable multi-channel function support in Blackfin ASoC driver. Because Blackfin is without MMU, it is easy for us and the user to enable this function at compiling stage not dynamically on the fly. Signed-off-by: Cliff Cai <cliff.cai@analog.com> Signed-off-by: Bryan Wu <cooloney@kernel.org> Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
195 lines
5.1 KiB
C
195 lines
5.1 KiB
C
/*
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* File: bf5xx_ac97_sport.h
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* Based on:
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* Author: Roy Huang <roy.huang@analog.com>
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*
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* Created:
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* Description:
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*
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* Copyright 2004-2007 Analog Devices Inc.
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*
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* Bugs: Enter bugs at http://blackfin.uclinux.org/
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, see the file COPYING, or write
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* to the Free Software Foundation, Inc.,
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* 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
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*/
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#ifndef __BF5XX_SPORT_H__
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#define __BF5XX_SPORT_H__
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#include <linux/types.h>
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#include <linux/wait.h>
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#include <linux/workqueue.h>
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#include <asm/dma.h>
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struct sport_register {
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u16 tcr1; u16 reserved0;
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u16 tcr2; u16 reserved1;
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u16 tclkdiv; u16 reserved2;
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u16 tfsdiv; u16 reserved3;
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u32 tx;
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u32 reserved_l0;
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u32 rx;
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u32 reserved_l1;
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u16 rcr1; u16 reserved4;
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u16 rcr2; u16 reserved5;
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u16 rclkdiv; u16 reserved6;
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u16 rfsdiv; u16 reserved7;
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u16 stat; u16 reserved8;
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u16 chnl; u16 reserved9;
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u16 mcmc1; u16 reserved10;
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u16 mcmc2; u16 reserved11;
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u32 mtcs0;
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u32 mtcs1;
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u32 mtcs2;
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u32 mtcs3;
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u32 mrcs0;
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u32 mrcs1;
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u32 mrcs2;
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u32 mrcs3;
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};
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#define DESC_ELEMENT_COUNT 9
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struct sport_device {
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int dma_rx_chan;
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int dma_tx_chan;
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int err_irq;
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struct sport_register *regs;
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unsigned char *rx_buf;
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unsigned char *tx_buf;
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unsigned int rx_fragsize;
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unsigned int tx_fragsize;
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unsigned int rx_frags;
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unsigned int tx_frags;
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unsigned int wdsize;
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/* for dummy dma transfer */
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void *dummy_buf;
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unsigned int dummy_count;
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/* DMA descriptor ring head of current audio stream*/
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struct dmasg *dma_rx_desc;
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struct dmasg *dma_tx_desc;
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unsigned int rx_desc_bytes;
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unsigned int tx_desc_bytes;
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unsigned int rx_run:1; /* rx is running */
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unsigned int tx_run:1; /* tx is running */
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struct dmasg *dummy_rx_desc;
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struct dmasg *dummy_tx_desc;
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struct dmasg *curr_rx_desc;
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struct dmasg *curr_tx_desc;
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int rx_curr_frag;
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int tx_curr_frag;
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unsigned int rcr1;
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unsigned int rcr2;
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int rx_tdm_count;
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unsigned int tcr1;
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unsigned int tcr2;
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int tx_tdm_count;
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void (*rx_callback)(void *data);
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void *rx_data;
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void (*tx_callback)(void *data);
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void *tx_data;
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void (*err_callback)(void *data);
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void *err_data;
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unsigned char *tx_dma_buf;
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unsigned char *rx_dma_buf;
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#ifdef CONFIG_SND_BF5XX_MMAP_SUPPORT
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dma_addr_t tx_dma_phy;
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dma_addr_t rx_dma_phy;
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int tx_pos;/*pcm sample count*/
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int rx_pos;
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unsigned int tx_buffer_size;
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unsigned int rx_buffer_size;
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int tx_delay_pos;
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int once;
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#endif
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void *private_data;
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};
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extern struct sport_device *sport_handle;
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struct sport_param {
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int dma_rx_chan;
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int dma_tx_chan;
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int err_irq;
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struct sport_register *regs;
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};
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struct sport_device *sport_init(struct sport_param *param, unsigned wdsize,
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unsigned dummy_count, void *private_data);
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void sport_done(struct sport_device *sport);
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/* first use these ...*/
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/* note: multichannel is in units of 8 channels, tdm_count is number of channels
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* NOT / 8 ! all channels are enabled by default */
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int sport_set_multichannel(struct sport_device *sport, int tdm_count,
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u32 mask, int packed);
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int sport_config_rx(struct sport_device *sport,
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unsigned int rcr1, unsigned int rcr2,
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unsigned int clkdiv, unsigned int fsdiv);
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int sport_config_tx(struct sport_device *sport,
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unsigned int tcr1, unsigned int tcr2,
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unsigned int clkdiv, unsigned int fsdiv);
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/* ... then these: */
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/* buffer size (in bytes) == fragcount * fragsize_bytes */
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/* this is not a very general api, it sets the dma to 2d autobuffer mode */
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int sport_config_rx_dma(struct sport_device *sport, void *buf,
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int fragcount, size_t fragsize_bytes);
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int sport_config_tx_dma(struct sport_device *sport, void *buf,
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int fragcount, size_t fragsize_bytes);
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int sport_tx_start(struct sport_device *sport);
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int sport_tx_stop(struct sport_device *sport);
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int sport_rx_start(struct sport_device *sport);
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int sport_rx_stop(struct sport_device *sport);
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/* for use in interrupt handler */
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unsigned long sport_curr_offset_rx(struct sport_device *sport);
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unsigned long sport_curr_offset_tx(struct sport_device *sport);
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void sport_incfrag(struct sport_device *sport, int *frag, int tx);
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void sport_decfrag(struct sport_device *sport, int *frag, int tx);
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int sport_set_rx_callback(struct sport_device *sport,
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void (*rx_callback)(void *), void *rx_data);
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int sport_set_tx_callback(struct sport_device *sport,
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void (*tx_callback)(void *), void *tx_data);
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int sport_set_err_callback(struct sport_device *sport,
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void (*err_callback)(void *), void *err_data);
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int sport_send_and_recv(struct sport_device *sport, u8 *out_data, \
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u8 *in_data, int len);
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#endif /* BF53X_SPORT_H */
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