AcoSail/kernel_optimize_test
8
0
Fork 0
forked from luck/tmp_suning_uos_patched
Code Pull Requests Activity
f2b9726105
kernel_optimize_test/arch/sh/kernel/cpu/sh3/pinmux-sh7720.c
Paul Mundt f727565013 sh: Move the CPU definition headers from asm/ to cpu/. 
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2008-10-20 12:04:53 +09:00

1243 lines
43 KiB
C
Raw Blame History

/*
* SH7720 Pinmux
*
* Copyright (C) 2008 Magnus Damm
*
* This file is subject to the terms and conditions of the GNU General Public
* License. See the file "COPYING" in the main directory of this archive
* for more details.
*/
#include <linux/init.h>
#include <linux/kernel.h>
#include <linux/gpio.h>
#include <cpu/sh7720.h>
enum {
PINMUX_RESERVED = 0,
PINMUX_DATA_BEGIN,
PTA7_DATA, PTA6_DATA, PTA5_DATA, PTA4_DATA,
PTA3_DATA, PTA2_DATA, PTA1_DATA, PTA0_DATA,
PTB7_DATA, PTB6_DATA, PTB5_DATA, PTB4_DATA,
PTB3_DATA, PTB2_DATA, PTB1_DATA, PTB0_DATA,
PTC7_DATA, PTC6_DATA, PTC5_DATA, PTC4_DATA,
PTC3_DATA, PTC2_DATA, PTC1_DATA, PTC0_DATA,
PTD7_DATA, PTD6_DATA, PTD5_DATA, PTD4_DATA,
PTD3_DATA, PTD2_DATA, PTD1_DATA, PTD0_DATA,
PTE6_DATA, PTE5_DATA, PTE4_DATA,
PTE3_DATA, PTE2_DATA, PTE1_DATA, PTE0_DATA,
PTF6_DATA, PTF5_DATA, PTF4_DATA,
PTF3_DATA, PTF2_DATA, PTF1_DATA, PTF0_DATA,
PTG6_DATA, PTG5_DATA, PTG4_DATA,
PTG3_DATA, PTG2_DATA, PTG1_DATA, PTG0_DATA,
PTH6_DATA, PTH5_DATA, PTH4_DATA,
PTH3_DATA, PTH2_DATA, PTH1_DATA, PTH0_DATA,
PTJ6_DATA, PTJ5_DATA, PTJ4_DATA,
PTJ3_DATA, PTJ2_DATA, PTJ1_DATA, PTJ0_DATA,
PTK3_DATA, PTK2_DATA, PTK1_DATA, PTK0_DATA,
PTL7_DATA, PTL6_DATA, PTL5_DATA, PTL4_DATA, PTL3_DATA,
PTM7_DATA, PTM6_DATA, PTM5_DATA, PTM4_DATA,
PTM3_DATA, PTM2_DATA, PTM1_DATA, PTM0_DATA,
PTP4_DATA, PTP3_DATA, PTP2_DATA, PTP1_DATA, PTP0_DATA,
PTR7_DATA, PTR6_DATA, PTR5_DATA, PTR4_DATA,
PTR3_DATA, PTR2_DATA, PTR1_DATA, PTR0_DATA,
PTS4_DATA, PTS3_DATA, PTS2_DATA, PTS1_DATA, PTS0_DATA,
PTT4_DATA, PTT3_DATA, PTT2_DATA, PTT1_DATA, PTT0_DATA,
PTU4_DATA, PTU3_DATA, PTU2_DATA, PTU1_DATA, PTU0_DATA,
PTV4_DATA, PTV3_DATA, PTV2_DATA, PTV1_DATA, PTV0_DATA,
PINMUX_DATA_END,
PINMUX_INPUT_BEGIN,
PTA7_IN, PTA6_IN, PTA5_IN, PTA4_IN,
PTA3_IN, PTA2_IN, PTA1_IN, PTA0_IN,
PTB7_IN, PTB6_IN, PTB5_IN, PTB4_IN,
PTB3_IN, PTB2_IN, PTB1_IN, PTB0_IN,
PTC7_IN, PTC6_IN, PTC5_IN, PTC4_IN,
PTC3_IN, PTC2_IN, PTC1_IN, PTC0_IN,
PTD7_IN, PTD6_IN, PTD5_IN, PTD4_IN,
PTD3_IN, PTD2_IN, PTD1_IN, PTD0_IN,
PTE6_IN, PTE5_IN, PTE4_IN,
PTE3_IN, PTE2_IN, PTE1_IN, PTE0_IN,
PTF6_IN, PTF5_IN, PTF4_IN,
PTF3_IN, PTF2_IN, PTF1_IN, PTF0_IN,
PTG6_IN, PTG5_IN, PTG4_IN,
PTG3_IN, PTG2_IN, PTG1_IN, PTG0_IN,
PTH6_IN, PTH5_IN, PTH4_IN,
PTH3_IN, PTH2_IN, PTH1_IN, PTH0_IN,
PTJ6_IN, PTJ5_IN, PTJ4_IN,
PTJ3_IN, PTJ2_IN, PTJ1_IN, PTJ0_IN,
PTK3_IN, PTK2_IN, PTK1_IN, PTK0_IN,
PTL7_IN, PTL6_IN, PTL5_IN, PTL4_IN, PTL3_IN,
PTM7_IN, PTM6_IN, PTM5_IN, PTM4_IN,
PTM3_IN, PTM2_IN, PTM1_IN, PTM0_IN,
PTP4_IN, PTP3_IN, PTP2_IN, PTP1_IN, PTP0_IN,
PTR7_IN, PTR6_IN, PTR5_IN, PTR4_IN,
PTR3_IN, PTR2_IN, PTR1_IN, PTR0_IN,
PTS4_IN, PTS3_IN, PTS2_IN, PTS1_IN, PTS0_IN,
PTT4_IN, PTT3_IN, PTT2_IN, PTT1_IN, PTT0_IN,
PTU4_IN, PTU3_IN, PTU2_IN, PTU1_IN, PTU0_IN,
PTV4_IN, PTV3_IN, PTV2_IN, PTV1_IN, PTV0_IN,
PINMUX_INPUT_END,
PINMUX_INPUT_PULLUP_BEGIN,
PTA7_IN_PU, PTA6_IN_PU, PTA5_IN_PU, PTA4_IN_PU,
PTA3_IN_PU, PTA2_IN_PU, PTA1_IN_PU, PTA0_IN_PU,
PTB7_IN_PU, PTB6_IN_PU, PTB5_IN_PU, PTB4_IN_PU,
PTB3_IN_PU, PTB2_IN_PU, PTB1_IN_PU, PTB0_IN_PU,
PTC7_IN_PU, PTC6_IN_PU, PTC5_IN_PU, PTC4_IN_PU,
PTC3_IN_PU, PTC2_IN_PU, PTC1_IN_PU, PTC0_IN_PU,
PTD7_IN_PU, PTD6_IN_PU, PTD5_IN_PU, PTD4_IN_PU,
PTD3_IN_PU, PTD2_IN_PU, PTD1_IN_PU, PTD0_IN_PU,
PTE4_IN_PU, PTE3_IN_PU, PTE2_IN_PU, PTE1_IN_PU, PTE0_IN_PU,
PTF0_IN_PU,
PTG6_IN_PU, PTG5_IN_PU, PTG4_IN_PU,
PTG3_IN_PU, PTG2_IN_PU, PTG1_IN_PU, PTG0_IN_PU,
PTH6_IN_PU, PTH5_IN_PU, PTH4_IN_PU,
PTH3_IN_PU, PTH2_IN_PU, PTH1_IN_PU, PTH0_IN_PU,
PTJ6_IN_PU, PTJ5_IN_PU, PTJ4_IN_PU,
PTJ3_IN_PU, PTJ2_IN_PU, PTJ1_IN_PU, PTJ0_IN_PU,
PTK3_IN_PU, PTK2_IN_PU, PTK1_IN_PU, PTK0_IN_PU,
PTL7_IN_PU, PTL6_IN_PU, PTL5_IN_PU, PTL4_IN_PU, PTL3_IN_PU,
PTM7_IN_PU, PTM6_IN_PU, PTM5_IN_PU, PTM4_IN_PU,
PTM3_IN_PU, PTM2_IN_PU, PTM1_IN_PU, PTM0_IN_PU,
PTP4_IN_PU, PTP3_IN_PU, PTP2_IN_PU, PTP1_IN_PU, PTP0_IN_PU,
PTR7_IN_PU, PTR6_IN_PU, PTR5_IN_PU, PTR4_IN_PU,
PTR3_IN_PU, PTR2_IN_PU, PTR1_IN_PU, PTR0_IN_PU,
PTS4_IN_PU, PTS3_IN_PU, PTS2_IN_PU, PTS1_IN_PU, PTS0_IN_PU,
PTT4_IN_PU, PTT3_IN_PU, PTT2_IN_PU, PTT1_IN_PU, PTT0_IN_PU,
PTU4_IN_PU, PTU3_IN_PU, PTU2_IN_PU, PTU1_IN_PU, PTU0_IN_PU,
PTV4_IN_PU, PTV3_IN_PU, PTV2_IN_PU, PTV1_IN_PU, PTV0_IN_PU,
PINMUX_INPUT_PULLUP_END,
PINMUX_OUTPUT_BEGIN,
PTA7_OUT, PTA6_OUT, PTA5_OUT, PTA4_OUT,
PTA3_OUT, PTA2_OUT, PTA1_OUT, PTA0_OUT,
PTB7_OUT, PTB6_OUT, PTB5_OUT, PTB4_OUT,
PTB3_OUT, PTB2_OUT, PTB1_OUT, PTB0_OUT,
PTC7_OUT, PTC6_OUT, PTC5_OUT, PTC4_OUT,
PTC3_OUT, PTC2_OUT, PTC1_OUT, PTC0_OUT,
PTD7_OUT, PTD6_OUT, PTD5_OUT, PTD4_OUT,
PTD3_OUT, PTD2_OUT, PTD1_OUT, PTD0_OUT,
PTE4_OUT, PTE3_OUT, PTE2_OUT, PTE1_OUT, PTE0_OUT,
PTF0_OUT,
PTG6_OUT, PTG5_OUT, PTG4_OUT,
PTG3_OUT, PTG2_OUT, PTG1_OUT, PTG0_OUT,
PTH6_OUT, PTH5_OUT, PTH4_OUT,
PTH3_OUT, PTH2_OUT, PTH1_OUT, PTH0_OUT,
PTJ6_OUT, PTJ5_OUT, PTJ4_OUT,
PTJ3_OUT, PTJ2_OUT, PTJ1_OUT, PTJ0_OUT,
PTK3_OUT, PTK2_OUT, PTK1_OUT, PTK0_OUT,
PTL7_OUT, PTL6_OUT, PTL5_OUT, PTL4_OUT, PTL3_OUT,
PTM7_OUT, PTM6_OUT, PTM5_OUT, PTM4_OUT,
PTM3_OUT, PTM2_OUT, PTM1_OUT, PTM0_OUT,
PTP4_OUT, PTP3_OUT, PTP2_OUT, PTP1_OUT, PTP0_OUT,
PTR7_OUT, PTR6_OUT, PTR5_OUT, PTR4_OUT,
PTR3_OUT, PTR2_OUT, PTR1_OUT, PTR0_OUT,
PTS4_OUT, PTS3_OUT, PTS2_OUT, PTS1_OUT, PTS0_OUT,
PTT4_OUT, PTT3_OUT, PTT2_OUT, PTT1_OUT, PTT0_OUT,
PTU4_OUT, PTU3_OUT, PTU2_OUT, PTU1_OUT, PTU0_OUT,
PTV4_OUT, PTV3_OUT, PTV2_OUT, PTV1_OUT, PTV0_OUT,
PINMUX_OUTPUT_END,
PINMUX_FUNCTION_BEGIN,
PTA7_FN, PTA6_FN, PTA5_FN, PTA4_FN,
PTA3_FN, PTA2_FN, PTA1_FN, PTA0_FN,
PTB7_FN, PTB6_FN, PTB5_FN, PTB4_FN,
PTB3_FN, PTB2_FN, PTB1_FN, PTB0_FN,
PTC7_FN, PTC6_FN, PTC5_FN, PTC4_FN,
PTC3_FN, PTC2_FN, PTC1_FN, PTC0_FN,
PTD7_FN, PTD6_FN, PTD5_FN, PTD4_FN,
PTD3_FN, PTD2_FN, PTD1_FN, PTD0_FN,
PTE6_FN, PTE5_FN, PTE4_FN,
PTE3_FN, PTE2_FN, PTE1_FN, PTE0_FN,
PTF6_FN, PTF5_FN, PTF4_FN,
PTF3_FN, PTF2_FN, PTF1_FN, PTF0_FN,
PTG6_FN, PTG5_FN, PTG4_FN,
PTG3_FN, PTG2_FN, PTG1_FN, PTG0_FN,
PTH6_FN, PTH5_FN, PTH4_FN,
PTH3_FN, PTH2_FN, PTH1_FN, PTH0_FN,
PTJ6_FN, PTJ5_FN, PTJ4_FN,
PTJ3_FN, PTJ2_FN, PTJ1_FN, PTJ0_FN,
PTK3_FN, PTK2_FN, PTK1_FN, PTK0_FN,
PTL7_FN, PTL6_FN, PTL5_FN, PTL4_FN, PTL3_FN,
PTM7_FN, PTM6_FN, PTM5_FN, PTM4_FN,
PTM3_FN, PTM2_FN, PTM1_FN, PTM0_FN,
PTP4_FN, PTP3_FN, PTP2_FN, PTP1_FN, PTP0_FN,
PTR7_FN, PTR6_FN, PTR5_FN, PTR4_FN,
PTR3_FN, PTR2_FN, PTR1_FN, PTR0_FN,
PTS4_FN, PTS3_FN, PTS2_FN, PTS1_FN, PTS0_FN,
PTT4_FN, PTT3_FN, PTT2_FN, PTT1_FN, PTT0_FN,
PTU4_FN, PTU3_FN, PTU2_FN, PTU1_FN, PTU0_FN,
PTV4_FN, PTV3_FN, PTV2_FN, PTV1_FN, PTV0_FN,
PSELA_1_0_00, PSELA_1_0_01, PSELA_1_0_10,
PSELA_3_2_00, PSELA_3_2_01, PSELA_3_2_10, PSELA_3_2_11,
PSELA_5_4_00, PSELA_5_4_01, PSELA_5_4_10, PSELA_5_4_11,
PSELA_7_6_00, PSELA_7_6_01, PSELA_7_6_10,
PSELA_9_8_00, PSELA_9_8_01, PSELA_9_8_10,
PSELA_11_10_00, PSELA_11_10_01, PSELA_11_10_10,
PSELA_13_12_00, PSELA_13_12_10,
PSELA_15_14_00, PSELA_15_14_10,
PSELB_9_8_00, PSELB_9_8_11,
PSELB_11_10_00, PSELB_11_10_01, PSELB_11_10_10, PSELB_11_10_11,
PSELB_13_12_00, PSELB_13_12_01, PSELB_13_12_10, PSELB_13_12_11,
PSELB_15_14_00, PSELB_15_14_11,
PSELC_9_8_00, PSELC_9_8_10,
PSELC_11_10_00, PSELC_11_10_10,
PSELC_13_12_00, PSELC_13_12_01, PSELC_13_12_10,
PSELC_15_14_00, PSELC_15_14_01, PSELC_15_14_10,
PSELD_1_0_00, PSELD_1_0_10,
PSELD_11_10_00, PSELD_11_10_01,
PSELD_15_14_00, PSELD_15_14_01, PSELD_15_14_10,
PINMUX_FUNCTION_END,
PINMUX_MARK_BEGIN,
D31_MARK, D30_MARK, D29_MARK, D28_MARK,
D27_MARK, D26_MARK, D25_MARK, D24_MARK,
D23_MARK, D22_MARK, D21_MARK, D20_MARK,
D19_MARK, D18_MARK, D17_MARK, D16_MARK,
IOIS16_MARK, RAS_MARK, CAS_MARK, CKE_MARK,
CS5B_CE1A_MARK, CS6B_CE1B_MARK,
A25_MARK, A24_MARK, A23_MARK, A22_MARK,
A21_MARK, A20_MARK, A19_MARK, A0_MARK,
REFOUT_MARK, IRQOUT_MARK,
LCD_DATA15_MARK, LCD_DATA14_MARK,
LCD_DATA13_MARK, LCD_DATA12_MARK,
LCD_DATA11_MARK, LCD_DATA10_MARK,
LCD_DATA9_MARK, LCD_DATA8_MARK,
LCD_DATA7_MARK, LCD_DATA6_MARK,
LCD_DATA5_MARK, LCD_DATA4_MARK,
LCD_DATA3_MARK, LCD_DATA2_MARK,
LCD_DATA1_MARK, LCD_DATA0_MARK,
LCD_M_DISP_MARK,
LCD_CL1_MARK, LCD_CL2_MARK,
LCD_DON_MARK, LCD_FLM_MARK,
LCD_VEPWC_MARK, LCD_VCPWC_MARK,
AFE_RXIN_MARK, AFE_RDET_MARK,
AFE_FS_MARK, AFE_TXOUT_MARK,
AFE_SCLK_MARK, AFE_RLYCNT_MARK,
AFE_HC1_MARK,
IIC_SCL_MARK, IIC_SDA_MARK,
DA1_MARK, DA0_MARK,
AN3_MARK, AN2_MARK, AN1_MARK, AN0_MARK, ADTRG_MARK,
USB1D_RCV_MARK, USB1D_TXSE0_MARK,
USB1D_TXDPLS_MARK, USB1D_DMNS_MARK,
USB1D_DPLS_MARK, USB1D_SPEED_MARK,
USB1D_TXENL_MARK,
USB2_PWR_EN_MARK, USB1_PWR_EN_USBF_UPLUP_MARK, USB1D_SUSPEND_MARK,
IRQ5_MARK, IRQ4_MARK,
IRQ3_IRL3_MARK, IRQ2_IRL2_MARK,
IRQ1_IRL1_MARK, IRQ0_IRL0_MARK,
PCC_REG_MARK, PCC_DRV_MARK,
PCC_BVD2_MARK, PCC_BVD1_MARK,
PCC_CD2_MARK, PCC_CD1_MARK,
PCC_RESET_MARK, PCC_RDY_MARK,
PCC_VS2_MARK, PCC_VS1_MARK,
AUDATA3_MARK, AUDATA2_MARK, AUDATA1_MARK, AUDATA0_MARK,
AUDCK_MARK, AUDSYNC_MARK, ASEBRKAK_MARK, TRST_MARK,
TMS_MARK, TDO_MARK, TDI_MARK, TCK_MARK,
DACK1_MARK, DREQ1_MARK, DACK0_MARK, DREQ0_MARK,
TEND1_MARK, TEND0_MARK,
SIOF0_SYNC_MARK, SIOF0_MCLK_MARK,
SIOF0_TXD_MARK, SIOF0_RXD_MARK,
SIOF0_SCK_MARK,
SIOF1_SYNC_MARK, SIOF1_MCLK_MARK,
SIOF1_TXD_MARK, SIOF1_RXD_MARK,
SIOF1_SCK_MARK,
SCIF0_TXD_MARK, SCIF0_RXD_MARK,
SCIF0_RTS_MARK, SCIF0_CTS_MARK, SCIF0_SCK_MARK,
SCIF1_TXD_MARK, SCIF1_RXD_MARK,
SCIF1_RTS_MARK, SCIF1_CTS_MARK, SCIF1_SCK_MARK,
TPU_TO1_MARK, TPU_TO0_MARK,
TPU_TI3B_MARK, TPU_TI3A_MARK,
TPU_TI2B_MARK, TPU_TI2A_MARK,
TPU_TO3_MARK, TPU_TO2_MARK,
SIM_D_MARK, SIM_CLK_MARK, SIM_RST_MARK,
MMC_DAT_MARK, MMC_CMD_MARK,
MMC_CLK_MARK, MMC_VDDON_MARK,
MMC_ODMOD_MARK,
STATUS0_MARK, STATUS1_MARK,
PINMUX_MARK_END,
};
static pinmux_enum_t pinmux_data[] = {
/* PTA GPIO */
PINMUX_DATA(PTA7_DATA, PTA7_IN, PTA7_OUT, PTA7_IN_PU),
PINMUX_DATA(PTA6_DATA, PTA6_IN, PTA6_OUT, PTA6_IN_PU),
PINMUX_DATA(PTA5_DATA, PTA5_IN, PTA5_OUT, PTA5_IN_PU),
PINMUX_DATA(PTA4_DATA, PTA4_IN, PTA4_OUT, PTA4_IN_PU),
PINMUX_DATA(PTA3_DATA, PTA3_IN, PTA3_OUT, PTA3_IN_PU),
PINMUX_DATA(PTA2_DATA, PTA2_IN, PTA2_OUT, PTA2_IN_PU),
PINMUX_DATA(PTA1_DATA, PTA1_IN, PTA1_OUT, PTA1_IN_PU),
PINMUX_DATA(PTA0_DATA, PTA0_IN, PTA0_OUT, PTA0_IN_PU),
/* PTB GPIO */
PINMUX_DATA(PTB7_DATA, PTB7_IN, PTB7_OUT, PTB7_IN_PU),
PINMUX_DATA(PTB6_DATA, PTB6_IN, PTB6_OUT, PTB6_IN_PU),
PINMUX_DATA(PTB5_DATA, PTB5_IN, PTB5_OUT, PTB5_IN_PU),
PINMUX_DATA(PTB4_DATA, PTB4_IN, PTB4_OUT, PTB4_IN_PU),
PINMUX_DATA(PTB3_DATA, PTB3_IN, PTB3_OUT, PTB3_IN_PU),
PINMUX_DATA(PTB2_DATA, PTB2_IN, PTB2_OUT, PTB2_IN_PU),
PINMUX_DATA(PTB1_DATA, PTB1_IN, PTB1_OUT, PTB1_IN_PU),
PINMUX_DATA(PTB0_DATA, PTB0_IN, PTB0_OUT, PTB0_IN_PU),
/* PTC GPIO */
PINMUX_DATA(PTC7_DATA, PTC7_IN, PTC7_OUT, PTC7_IN_PU),
PINMUX_DATA(PTC6_DATA, PTC6_IN, PTC6_OUT, PTC6_IN_PU),
PINMUX_DATA(PTC5_DATA, PTC5_IN, PTC5_OUT, PTC5_IN_PU),
PINMUX_DATA(PTC4_DATA, PTC4_IN, PTC4_OUT, PTC4_IN_PU),
PINMUX_DATA(PTC3_DATA, PTC3_IN, PTC3_OUT, PTC3_IN_PU),
PINMUX_DATA(PTC2_DATA, PTC2_IN, PTC2_OUT, PTC2_IN_PU),
PINMUX_DATA(PTC1_DATA, PTC1_IN, PTC1_OUT, PTC1_IN_PU),
PINMUX_DATA(PTC0_DATA, PTC0_IN, PTC0_OUT, PTC0_IN_PU),
/* PTD GPIO */
PINMUX_DATA(PTD7_DATA, PTD7_IN, PTD7_OUT, PTD7_IN_PU),
PINMUX_DATA(PTD6_DATA, PTD6_IN, PTD6_OUT, PTD6_IN_PU),
PINMUX_DATA(PTD5_DATA, PTD5_IN, PTD5_OUT, PTD5_IN_PU),
PINMUX_DATA(PTD4_DATA, PTD4_IN, PTD4_OUT, PTD4_IN_PU),
PINMUX_DATA(PTD3_DATA, PTD3_IN, PTD3_OUT, PTD3_IN_PU),
PINMUX_DATA(PTD2_DATA, PTD2_IN, PTD2_OUT, PTD2_IN_PU),
PINMUX_DATA(PTD1_DATA, PTD1_IN, PTD1_OUT, PTD1_IN_PU),
PINMUX_DATA(PTD0_DATA, PTD0_IN, PTD0_OUT, PTD0_IN_PU),
/* PTE GPIO */
PINMUX_DATA(PTE6_DATA, PTE6_IN),
PINMUX_DATA(PTE5_DATA, PTE5_IN),
PINMUX_DATA(PTE4_DATA, PTE4_IN, PTE4_OUT, PTE4_IN_PU),
PINMUX_DATA(PTE3_DATA, PTE3_IN, PTE3_OUT, PTE3_IN_PU),
PINMUX_DATA(PTE2_DATA, PTE2_IN, PTE2_OUT, PTE2_IN_PU),
PINMUX_DATA(PTE1_DATA, PTE1_IN, PTE1_OUT, PTE1_IN_PU),
PINMUX_DATA(PTE0_DATA, PTE0_IN, PTE0_OUT, PTE0_IN_PU),
/* PTF GPIO */
PINMUX_DATA(PTF6_DATA, PTF6_IN),
PINMUX_DATA(PTF5_DATA, PTF5_IN),
PINMUX_DATA(PTF4_DATA, PTF4_IN),
PINMUX_DATA(PTF3_DATA, PTF3_IN),
PINMUX_DATA(PTF2_DATA, PTF2_IN),
PINMUX_DATA(PTF1_DATA, PTF1_IN),
PINMUX_DATA(PTF0_DATA, PTF0_IN, PTF0_OUT, PTF0_IN_PU),
/* PTG GPIO */
PINMUX_DATA(PTG6_DATA, PTG6_IN, PTG6_OUT, PTG6_IN_PU),
PINMUX_DATA(PTG5_DATA, PTG5_IN, PTG5_OUT, PTG5_IN_PU),
PINMUX_DATA(PTG4_DATA, PTG4_IN, PTG4_OUT, PTG4_IN_PU),
PINMUX_DATA(PTG3_DATA, PTG3_IN, PTG3_OUT, PTG3_IN_PU),
PINMUX_DATA(PTG2_DATA, PTG2_IN, PTG2_OUT, PTG2_IN_PU),
PINMUX_DATA(PTG1_DATA, PTG1_IN, PTG1_OUT, PTG1_IN_PU),
PINMUX_DATA(PTG0_DATA, PTG0_IN, PTG0_OUT, PTG0_IN_PU),
/* PTH GPIO */
PINMUX_DATA(PTH6_DATA, PTH6_IN, PTH6_OUT, PTH6_IN_PU),
PINMUX_DATA(PTH5_DATA, PTH5_IN, PTH5_OUT, PTH5_IN_PU),
PINMUX_DATA(PTH4_DATA, PTH4_IN, PTH4_OUT, PTH4_IN_PU),
PINMUX_DATA(PTH3_DATA, PTH3_IN, PTH3_OUT, PTH3_IN_PU),
PINMUX_DATA(PTH2_DATA, PTH2_IN, PTH2_OUT, PTH2_IN_PU),
PINMUX_DATA(PTH1_DATA, PTH1_IN, PTH1_OUT, PTH1_IN_PU),
PINMUX_DATA(PTH0_DATA, PTH0_IN, PTH0_OUT, PTH0_IN_PU),
/* PTJ GPIO */
PINMUX_DATA(PTJ6_DATA, PTJ6_IN, PTJ6_OUT, PTJ6_IN_PU),
PINMUX_DATA(PTJ5_DATA, PTJ5_IN, PTJ5_OUT, PTJ5_IN_PU),
PINMUX_DATA(PTJ4_DATA, PTJ4_IN, PTJ4_OUT, PTJ4_IN_PU),
PINMUX_DATA(PTJ3_DATA, PTJ3_IN, PTJ3_OUT, PTJ3_IN_PU),
PINMUX_DATA(PTJ2_DATA, PTJ2_IN, PTJ2_OUT, PTJ2_IN_PU),
PINMUX_DATA(PTJ1_DATA, PTJ1_IN, PTJ1_OUT, PTJ1_IN_PU),
PINMUX_DATA(PTJ0_DATA, PTJ0_IN, PTJ0_OUT, PTJ0_IN_PU),
/* PTK GPIO */
PINMUX_DATA(PTK3_DATA, PTK3_IN, PTK3_OUT, PTK3_IN_PU),
PINMUX_DATA(PTK2_DATA, PTK2_IN, PTK2_OUT, PTK2_IN_PU),
PINMUX_DATA(PTK1_DATA, PTK1_IN, PTK1_OUT, PTK1_IN_PU),
PINMUX_DATA(PTK0_DATA, PTK0_IN, PTK0_OUT, PTK0_IN_PU),
/* PTL GPIO */
PINMUX_DATA(PTL7_DATA, PTL7_IN, PTL7_OUT, PTL7_IN_PU),
PINMUX_DATA(PTL6_DATA, PTL6_IN, PTL6_OUT, PTL6_IN_PU),
PINMUX_DATA(PTL5_DATA, PTL5_IN, PTL5_OUT, PTL5_IN_PU),
PINMUX_DATA(PTL4_DATA, PTL4_IN, PTL4_OUT, PTL4_IN_PU),
PINMUX_DATA(PTL3_DATA, PTL3_IN, PTL3_OUT, PTL3_IN_PU),
/* PTM GPIO */
PINMUX_DATA(PTM7_DATA, PTM7_IN, PTM7_OUT, PTM7_IN_PU),
PINMUX_DATA(PTM6_DATA, PTM6_IN, PTM6_OUT, PTM6_IN_PU),
PINMUX_DATA(PTM5_DATA, PTM5_IN, PTM5_OUT, PTM5_IN_PU),
PINMUX_DATA(PTM4_DATA, PTM4_IN, PTM4_OUT, PTM4_IN_PU),
PINMUX_DATA(PTM3_DATA, PTM3_IN, PTM3_OUT, PTM3_IN_PU),
PINMUX_DATA(PTM2_DATA, PTM2_IN, PTM2_OUT, PTM2_IN_PU),
PINMUX_DATA(PTM1_DATA, PTM1_IN, PTM1_OUT, PTM1_IN_PU),
PINMUX_DATA(PTM0_DATA, PTM0_IN, PTM0_OUT, PTM0_IN_PU),
/* PTP GPIO */
PINMUX_DATA(PTP4_DATA, PTP4_IN, PTP4_OUT, PTP4_IN_PU),
PINMUX_DATA(PTP3_DATA, PTP3_IN, PTP3_OUT, PTP3_IN_PU),
PINMUX_DATA(PTP2_DATA, PTP2_IN, PTP2_OUT, PTP2_IN_PU),
PINMUX_DATA(PTP1_DATA, PTP1_IN, PTP1_OUT, PTP1_IN_PU),
PINMUX_DATA(PTP0_DATA, PTP0_IN, PTP0_OUT, PTP0_IN_PU),
/* PTR GPIO */
PINMUX_DATA(PTR7_DATA, PTR7_IN, PTR7_OUT, PTR7_IN_PU),
PINMUX_DATA(PTR6_DATA, PTR6_IN, PTR6_OUT, PTR6_IN_PU),
PINMUX_DATA(PTR5_DATA, PTR5_IN, PTR5_OUT, PTR5_IN_PU),
PINMUX_DATA(PTR4_DATA, PTR4_IN, PTR4_OUT, PTR4_IN_PU),
PINMUX_DATA(PTR3_DATA, PTR3_IN, PTR3_OUT, PTR3_IN_PU),
PINMUX_DATA(PTR2_DATA, PTR2_IN, PTR2_OUT, PTR2_IN_PU),
PINMUX_DATA(PTR1_DATA, PTR1_IN, PTR1_OUT, PTR1_IN_PU),
PINMUX_DATA(PTR0_DATA, PTR0_IN, PTR0_OUT, PTR0_IN_PU),
/* PTS GPIO */
PINMUX_DATA(PTS4_DATA, PTS4_IN, PTS4_OUT, PTS4_IN_PU),
PINMUX_DATA(PTS3_DATA, PTS3_IN, PTS3_OUT, PTS3_IN_PU),
PINMUX_DATA(PTS2_DATA, PTS2_IN, PTS2_OUT, PTS2_IN_PU),
PINMUX_DATA(PTS1_DATA, PTS1_IN, PTS1_OUT, PTS1_IN_PU),
PINMUX_DATA(PTS0_DATA, PTS0_IN, PTS0_OUT, PTS0_IN_PU),
/* PTT GPIO */
PINMUX_DATA(PTT4_DATA, PTT4_IN, PTT4_OUT, PTT4_IN_PU),
PINMUX_DATA(PTT3_DATA, PTT3_IN, PTT3_OUT, PTT3_IN_PU),
PINMUX_DATA(PTT2_DATA, PTT2_IN, PTT2_OUT, PTT2_IN_PU),
PINMUX_DATA(PTT1_DATA, PTT1_IN, PTT1_OUT, PTT1_IN_PU),
PINMUX_DATA(PTT0_DATA, PTT0_IN, PTT0_OUT, PTT0_IN_PU),
/* PTU GPIO */
PINMUX_DATA(PTU4_DATA, PTU4_IN, PTU4_OUT, PTU4_IN_PU),
PINMUX_DATA(PTU3_DATA, PTU3_IN, PTU3_OUT, PTU3_IN_PU),
PINMUX_DATA(PTU2_DATA, PTU2_IN, PTU2_OUT, PTU2_IN_PU),
PINMUX_DATA(PTU1_DATA, PTU1_IN, PTU1_OUT, PTU1_IN_PU),
PINMUX_DATA(PTU0_DATA, PTU0_IN, PTU0_OUT, PTU0_IN_PU),
/* PTV GPIO */
PINMUX_DATA(PTV4_DATA, PTV4_IN, PTV4_OUT, PTV4_IN_PU),
PINMUX_DATA(PTV3_DATA, PTV3_IN, PTV3_OUT, PTV3_IN_PU),
PINMUX_DATA(PTV2_DATA, PTV2_IN, PTV2_OUT, PTV2_IN_PU),
PINMUX_DATA(PTV1_DATA, PTV1_IN, PTV1_OUT, PTV1_IN_PU),
PINMUX_DATA(PTV0_DATA, PTV0_IN, PTV0_OUT, PTV0_IN_PU),
/* PTA FN */
PINMUX_DATA(D23_MARK, PTA7_FN),
PINMUX_DATA(D22_MARK, PTA6_FN),
PINMUX_DATA(D21_MARK, PTA5_FN),
PINMUX_DATA(D20_MARK, PTA4_FN),
PINMUX_DATA(D19_MARK, PTA3_FN),
PINMUX_DATA(D18_MARK, PTA2_FN),
PINMUX_DATA(D17_MARK, PTA1_FN),
PINMUX_DATA(D16_MARK, PTA0_FN),
/* PTB FN */
PINMUX_DATA(D31_MARK, PTB7_FN),
PINMUX_DATA(D30_MARK, PTB6_FN),
PINMUX_DATA(D29_MARK, PTB5_FN),
PINMUX_DATA(D28_MARK, PTB4_FN),
PINMUX_DATA(D27_MARK, PTB3_FN),
PINMUX_DATA(D26_MARK, PTB2_FN),
PINMUX_DATA(D25_MARK, PTB1_FN),
PINMUX_DATA(D24_MARK, PTB0_FN),
/* PTC FN */
PINMUX_DATA(LCD_DATA7_MARK, PTC7_FN),
PINMUX_DATA(LCD_DATA6_MARK, PTC6_FN),
PINMUX_DATA(LCD_DATA5_MARK, PTC5_FN),
PINMUX_DATA(LCD_DATA4_MARK, PTC4_FN),
PINMUX_DATA(LCD_DATA3_MARK, PTC3_FN),
PINMUX_DATA(LCD_DATA2_MARK, PTC2_FN),
PINMUX_DATA(LCD_DATA1_MARK, PTC1_FN),
PINMUX_DATA(LCD_DATA0_MARK, PTC0_FN),
/* PTD FN */
PINMUX_DATA(LCD_DATA15_MARK, PTD7_FN),
PINMUX_DATA(LCD_DATA14_MARK, PTD6_FN),
PINMUX_DATA(LCD_DATA13_MARK, PTD5_FN),
PINMUX_DATA(LCD_DATA12_MARK, PTD4_FN),
PINMUX_DATA(LCD_DATA11_MARK, PTD3_FN),
PINMUX_DATA(LCD_DATA10_MARK, PTD2_FN),
PINMUX_DATA(LCD_DATA9_MARK, PTD1_FN),
PINMUX_DATA(LCD_DATA8_MARK, PTD0_FN),
/* PTE FN */
PINMUX_DATA(IIC_SCL_MARK, PSELB_9_8_00, PTE6_FN),
PINMUX_DATA(AFE_RXIN_MARK, PSELB_9_8_11, PTE6_FN),
PINMUX_DATA(IIC_SDA_MARK, PSELB_9_8_00, PTE5_FN),
PINMUX_DATA(AFE_RDET_MARK, PSELB_9_8_11, PTE5_FN),
PINMUX_DATA(LCD_M_DISP_MARK, PTE4_FN),
PINMUX_DATA(LCD_CL1_MARK, PTE3_FN),
PINMUX_DATA(LCD_CL2_MARK, PTE2_FN),
PINMUX_DATA(LCD_DON_MARK, PTE1_FN),
PINMUX_DATA(LCD_FLM_MARK, PTE0_FN),
/* PTF FN */
PINMUX_DATA(DA1_MARK, PTF6_FN),
PINMUX_DATA(DA0_MARK, PTF5_FN),
PINMUX_DATA(AN3_MARK, PTF4_FN),
PINMUX_DATA(AN2_MARK, PTF3_FN),
PINMUX_DATA(AN1_MARK, PTF2_FN),
PINMUX_DATA(AN0_MARK, PTF1_FN),
PINMUX_DATA(ADTRG_MARK, PTF0_FN),
/* PTG FN */
PINMUX_DATA(USB1D_RCV_MARK, PSELA_3_2_00, PTG6_FN),
PINMUX_DATA(AFE_FS_MARK, PSELA_3_2_01, PTG6_FN),
PINMUX_DATA(PCC_REG_MARK, PSELA_3_2_10, PTG6_FN),
PINMUX_DATA(IRQ5_MARK, PSELA_3_2_11, PTG6_FN),
PINMUX_DATA(USB1D_TXSE0_MARK, PSELA_5_4_00, PTG5_FN),
PINMUX_DATA(AFE_TXOUT_MARK, PSELA_5_4_01, PTG5_FN),
PINMUX_DATA(PCC_DRV_MARK, PSELA_5_4_10, PTG5_FN),
PINMUX_DATA(IRQ4_MARK, PSELA_5_4_11, PTG5_FN),
PINMUX_DATA(USB1D_TXDPLS_MARK, PSELA_7_6_00, PTG4_FN),
PINMUX_DATA(AFE_SCLK_MARK, PSELA_7_6_01, PTG4_FN),
PINMUX_DATA(IOIS16_MARK, PSELA_7_6_10, PTG4_FN),
PINMUX_DATA(USB1D_DMNS_MARK, PSELA_9_8_00, PTG3_FN),
PINMUX_DATA(AFE_RLYCNT_MARK, PSELA_9_8_01, PTG3_FN),
PINMUX_DATA(PCC_BVD2_MARK, PSELA_9_8_10, PTG3_FN),
PINMUX_DATA(USB1D_DPLS_MARK, PSELA_11_10_00, PTG2_FN),
PINMUX_DATA(AFE_HC1_MARK, PSELA_11_10_01, PTG2_FN),
PINMUX_DATA(PCC_BVD1_MARK, PSELA_11_10_10, PTG2_FN),
PINMUX_DATA(USB1D_SPEED_MARK, PSELA_13_12_00, PTG1_FN),
PINMUX_DATA(PCC_CD2_MARK, PSELA_13_12_10, PTG1_FN),
PINMUX_DATA(USB1D_TXENL_MARK, PSELA_15_14_00, PTG0_FN),
PINMUX_DATA(PCC_CD1_MARK, PSELA_15_14_10, PTG0_FN),
/* PTH FN */
PINMUX_DATA(RAS_MARK, PTH6_FN),
PINMUX_DATA(CAS_MARK, PTH5_FN),
PINMUX_DATA(CKE_MARK, PTH4_FN),
PINMUX_DATA(STATUS1_MARK, PTH3_FN),
PINMUX_DATA(STATUS0_MARK, PTH2_FN),
PINMUX_DATA(USB2_PWR_EN_MARK, PTH1_FN),
PINMUX_DATA(USB1_PWR_EN_USBF_UPLUP_MARK, PTH0_FN),
/* PTJ FN */
PINMUX_DATA(AUDCK_MARK, PTJ6_FN),
PINMUX_DATA(ASEBRKAK_MARK, PTJ5_FN),
PINMUX_DATA(AUDATA3_MARK, PTJ4_FN),
PINMUX_DATA(AUDATA2_MARK, PTJ3_FN),
PINMUX_DATA(AUDATA1_MARK, PTJ2_FN),
PINMUX_DATA(AUDATA0_MARK, PTJ1_FN),
PINMUX_DATA(AUDSYNC_MARK, PTJ0_FN),
/* PTK FN */
PINMUX_DATA(PCC_RESET_MARK, PTK3_FN),
PINMUX_DATA(PCC_RDY_MARK, PTK2_FN),
PINMUX_DATA(PCC_VS2_MARK, PTK1_FN),
PINMUX_DATA(PCC_VS1_MARK, PTK0_FN),
/* PTL FN */
PINMUX_DATA(TRST_MARK, PTL7_FN),
PINMUX_DATA(TMS_MARK, PTL6_FN),
PINMUX_DATA(TDO_MARK, PTL5_FN),
PINMUX_DATA(TDI_MARK, PTL4_FN),
PINMUX_DATA(TCK_MARK, PTL3_FN),
/* PTM FN */
PINMUX_DATA(DREQ1_MARK, PTM7_FN),
PINMUX_DATA(DREQ0_MARK, PTM6_FN),
PINMUX_DATA(DACK1_MARK, PTM5_FN),
PINMUX_DATA(DACK0_MARK, PTM4_FN),
PINMUX_DATA(TEND1_MARK, PTM3_FN),
PINMUX_DATA(TEND0_MARK, PTM2_FN),
PINMUX_DATA(CS5B_CE1A_MARK, PTM1_FN),
PINMUX_DATA(CS6B_CE1B_MARK, PTM0_FN),
/* PTP FN */
PINMUX_DATA(USB1D_SUSPEND_MARK, PSELA_1_0_00, PTP4_FN),
PINMUX_DATA(REFOUT_MARK, PSELA_1_0_01, PTP4_FN),
PINMUX_DATA(IRQOUT_MARK, PSELA_1_0_10, PTP4_FN),
PINMUX_DATA(IRQ3_IRL3_MARK, PTP3_FN),
PINMUX_DATA(IRQ2_IRL2_MARK, PTP2_FN),
PINMUX_DATA(IRQ1_IRL1_MARK, PTP1_FN),
PINMUX_DATA(IRQ0_IRL0_MARK, PTP0_FN),
/* PTR FN */
PINMUX_DATA(A25_MARK, PTR7_FN),
PINMUX_DATA(A24_MARK, PTR6_FN),
PINMUX_DATA(A23_MARK, PTR5_FN),
PINMUX_DATA(A22_MARK, PTR4_FN),
PINMUX_DATA(A21_MARK, PTR3_FN),
PINMUX_DATA(A20_MARK, PTR2_FN),
PINMUX_DATA(A19_MARK, PTR1_FN),
PINMUX_DATA(A0_MARK, PTR0_FN),
/* PTS FN */
PINMUX_DATA(SIOF0_SYNC_MARK, PTS4_FN),
PINMUX_DATA(SIOF0_MCLK_MARK, PTS3_FN),
PINMUX_DATA(SIOF0_TXD_MARK, PTS2_FN),
PINMUX_DATA(SIOF0_RXD_MARK, PTS1_FN),
PINMUX_DATA(SIOF0_SCK_MARK, PTS0_FN),
/* PTT FN */
PINMUX_DATA(SCIF0_CTS_MARK, PSELB_15_14_00, PTT4_FN),
PINMUX_DATA(TPU_TO1_MARK, PSELB_15_14_11, PTT4_FN),
PINMUX_DATA(SCIF0_RTS_MARK, PSELB_15_14_00, PTT3_FN),
PINMUX_DATA(TPU_TO0_MARK, PSELB_15_14_11, PTT3_FN),
PINMUX_DATA(SCIF0_TXD_MARK, PTT2_FN),
PINMUX_DATA(SCIF0_RXD_MARK, PTT1_FN),
PINMUX_DATA(SCIF0_SCK_MARK, PTT0_FN),
/* PTU FN */
PINMUX_DATA(SIOF1_SYNC_MARK, PTU4_FN),
PINMUX_DATA(SIOF1_MCLK_MARK, PSELD_11_10_00, PTU3_FN),
PINMUX_DATA(TPU_TI3B_MARK, PSELD_11_10_01, PTU3_FN),
PINMUX_DATA(SIOF1_TXD_MARK, PSELD_15_14_00, PTU2_FN),
PINMUX_DATA(TPU_TI3A_MARK, PSELD_15_14_01, PTU2_FN),
PINMUX_DATA(MMC_DAT_MARK, PSELD_15_14_10, PTU2_FN),
PINMUX_DATA(SIOF1_RXD_MARK, PSELC_13_12_00, PTU1_FN),
PINMUX_DATA(TPU_TI2B_MARK, PSELC_13_12_01, PTU1_FN),
PINMUX_DATA(MMC_CMD_MARK, PSELC_13_12_10, PTU1_FN),
PINMUX_DATA(SIOF1_SCK_MARK, PSELC_15_14_00, PTU0_FN),
PINMUX_DATA(TPU_TI2A_MARK, PSELC_15_14_01, PTU0_FN),
PINMUX_DATA(MMC_CLK_MARK, PSELC_15_14_10, PTU0_FN),
/* PTV FN */
PINMUX_DATA(SCIF1_CTS_MARK, PSELB_11_10_00, PTV4_FN),
PINMUX_DATA(TPU_TO3_MARK, PSELB_11_10_01, PTV4_FN),
PINMUX_DATA(MMC_VDDON_MARK, PSELB_11_10_10, PTV4_FN),
PINMUX_DATA(LCD_VEPWC_MARK, PSELB_11_10_11, PTV4_FN),
PINMUX_DATA(SCIF1_RTS_MARK, PSELB_13_12_00, PTV3_FN),
PINMUX_DATA(TPU_TO2_MARK, PSELB_13_12_01, PTV3_FN),
PINMUX_DATA(MMC_ODMOD_MARK, PSELB_13_12_10, PTV3_FN),
PINMUX_DATA(LCD_VCPWC_MARK, PSELB_13_12_11, PTV3_FN),
PINMUX_DATA(SCIF1_TXD_MARK, PSELC_9_8_00, PTV2_FN),
PINMUX_DATA(SIM_D_MARK, PSELC_9_8_10, PTV2_FN),
PINMUX_DATA(SCIF1_RXD_MARK, PSELC_11_10_00, PTV1_FN),
PINMUX_DATA(SIM_RST_MARK, PSELC_11_10_10, PTV1_FN),
PINMUX_DATA(SCIF1_SCK_MARK, PSELD_1_0_00, PTV0_FN),
PINMUX_DATA(SIM_CLK_MARK, PSELD_1_0_10, PTV0_FN),
};
static struct pinmux_gpio pinmux_gpios[] = {
/* PTA */
PINMUX_GPIO(GPIO_PTA7, PTA7_DATA),
PINMUX_GPIO(GPIO_PTA6, PTA6_DATA),
PINMUX_GPIO(GPIO_PTA5, PTA5_DATA),
PINMUX_GPIO(GPIO_PTA4, PTA4_DATA),
PINMUX_GPIO(GPIO_PTA3, PTA3_DATA),
PINMUX_GPIO(GPIO_PTA2, PTA2_DATA),
PINMUX_GPIO(GPIO_PTA1, PTA1_DATA),
PINMUX_GPIO(GPIO_PTA0, PTA0_DATA),
/* PTB */
PINMUX_GPIO(GPIO_PTB7, PTB7_DATA),
PINMUX_GPIO(GPIO_PTB6, PTB6_DATA),
PINMUX_GPIO(GPIO_PTB5, PTB5_DATA),
PINMUX_GPIO(GPIO_PTB4, PTB4_DATA),
PINMUX_GPIO(GPIO_PTB3, PTB3_DATA),
PINMUX_GPIO(GPIO_PTB2, PTB2_DATA),
PINMUX_GPIO(GPIO_PTB1, PTB1_DATA),
PINMUX_GPIO(GPIO_PTB0, PTB0_DATA),
/* PTC */
PINMUX_GPIO(GPIO_PTC7, PTC7_DATA),
PINMUX_GPIO(GPIO_PTC6, PTC6_DATA),
PINMUX_GPIO(GPIO_PTC5, PTC5_DATA),
PINMUX_GPIO(GPIO_PTC4, PTC4_DATA),
PINMUX_GPIO(GPIO_PTC3, PTC3_DATA),
PINMUX_GPIO(GPIO_PTC2, PTC2_DATA),
PINMUX_GPIO(GPIO_PTC1, PTC1_DATA),
PINMUX_GPIO(GPIO_PTC0, PTC0_DATA),
/* PTD */
PINMUX_GPIO(GPIO_PTD7, PTD7_DATA),
PINMUX_GPIO(GPIO_PTD6, PTD6_DATA),
PINMUX_GPIO(GPIO_PTD5, PTD5_DATA),
PINMUX_GPIO(GPIO_PTD4, PTD4_DATA),
PINMUX_GPIO(GPIO_PTD3, PTD3_DATA),
PINMUX_GPIO(GPIO_PTD2, PTD2_DATA),
PINMUX_GPIO(GPIO_PTD1, PTD1_DATA),
PINMUX_GPIO(GPIO_PTD0, PTD0_DATA),
/* PTE */
PINMUX_GPIO(GPIO_PTE6, PTE6_DATA),
PINMUX_GPIO(GPIO_PTE5, PTE5_DATA),
PINMUX_GPIO(GPIO_PTE4, PTE4_DATA),
PINMUX_GPIO(GPIO_PTE3, PTE3_DATA),
PINMUX_GPIO(GPIO_PTE2, PTE2_DATA),
PINMUX_GPIO(GPIO_PTE1, PTE1_DATA),
PINMUX_GPIO(GPIO_PTE0, PTE0_DATA),
/* PTF */
PINMUX_GPIO(GPIO_PTF6, PTF6_DATA),
PINMUX_GPIO(GPIO_PTF5, PTF5_DATA),
PINMUX_GPIO(GPIO_PTF4, PTF4_DATA),
PINMUX_GPIO(GPIO_PTF3, PTF3_DATA),
PINMUX_GPIO(GPIO_PTF2, PTF2_DATA),
PINMUX_GPIO(GPIO_PTF1, PTF1_DATA),
PINMUX_GPIO(GPIO_PTF0, PTF0_DATA),
/* PTG */
PINMUX_GPIO(GPIO_PTG6, PTG6_DATA),
PINMUX_GPIO(GPIO_PTG5, PTG5_DATA),
PINMUX_GPIO(GPIO_PTG4, PTG4_DATA),
PINMUX_GPIO(GPIO_PTG3, PTG3_DATA),
PINMUX_GPIO(GPIO_PTG2, PTG2_DATA),
PINMUX_GPIO(GPIO_PTG1, PTG1_DATA),
PINMUX_GPIO(GPIO_PTG0, PTG0_DATA),
/* PTH */
PINMUX_GPIO(GPIO_PTH6, PTH6_DATA),
PINMUX_GPIO(GPIO_PTH5, PTH5_DATA),
PINMUX_GPIO(GPIO_PTH4, PTH4_DATA),
PINMUX_GPIO(GPIO_PTH3, PTH3_DATA),
PINMUX_GPIO(GPIO_PTH2, PTH2_DATA),
PINMUX_GPIO(GPIO_PTH1, PTH1_DATA),
PINMUX_GPIO(GPIO_PTH0, PTH0_DATA),
/* PTJ */
PINMUX_GPIO(GPIO_PTJ6, PTJ6_DATA),
PINMUX_GPIO(GPIO_PTJ5, PTJ5_DATA),
PINMUX_GPIO(GPIO_PTJ4, PTJ4_DATA),
PINMUX_GPIO(GPIO_PTJ3, PTJ3_DATA),
PINMUX_GPIO(GPIO_PTJ2, PTJ2_DATA),
PINMUX_GPIO(GPIO_PTJ1, PTJ1_DATA),
PINMUX_GPIO(GPIO_PTJ0, PTJ0_DATA),
/* PTK */
PINMUX_GPIO(GPIO_PTK3, PTK3_DATA),
PINMUX_GPIO(GPIO_PTK2, PTK2_DATA),
PINMUX_GPIO(GPIO_PTK1, PTK1_DATA),
PINMUX_GPIO(GPIO_PTK0, PTK0_DATA),
/* PTL */
PINMUX_GPIO(GPIO_PTL7, PTL7_DATA),
PINMUX_GPIO(GPIO_PTL6, PTL6_DATA),
PINMUX_GPIO(GPIO_PTL5, PTL5_DATA),
PINMUX_GPIO(GPIO_PTL4, PTL4_DATA),
PINMUX_GPIO(GPIO_PTL3, PTL3_DATA),
/* PTM */
PINMUX_GPIO(GPIO_PTM7, PTM7_DATA),
PINMUX_GPIO(GPIO_PTM6, PTM6_DATA),
PINMUX_GPIO(GPIO_PTM5, PTM5_DATA),
PINMUX_GPIO(GPIO_PTM4, PTM4_DATA),
PINMUX_GPIO(GPIO_PTM3, PTM3_DATA),
PINMUX_GPIO(GPIO_PTM2, PTM2_DATA),
PINMUX_GPIO(GPIO_PTM1, PTM1_DATA),
PINMUX_GPIO(GPIO_PTM0, PTM0_DATA),
/* PTP */
PINMUX_GPIO(GPIO_PTP4, PTP4_DATA),
PINMUX_GPIO(GPIO_PTP3, PTP3_DATA),
PINMUX_GPIO(GPIO_PTP2, PTP2_DATA),
PINMUX_GPIO(GPIO_PTP1, PTP1_DATA),
PINMUX_GPIO(GPIO_PTP0, PTP0_DATA),
/* PTR */
PINMUX_GPIO(GPIO_PTR7, PTR7_DATA),
PINMUX_GPIO(GPIO_PTR6, PTR6_DATA),
PINMUX_GPIO(GPIO_PTR5, PTR5_DATA),
PINMUX_GPIO(GPIO_PTR4, PTR4_DATA),
PINMUX_GPIO(GPIO_PTR3, PTR3_DATA),
PINMUX_GPIO(GPIO_PTR2, PTR2_DATA),
PINMUX_GPIO(GPIO_PTR1, PTR1_DATA),
PINMUX_GPIO(GPIO_PTR0, PTR0_DATA),
/* PTS */
PINMUX_GPIO(GPIO_PTS4, PTS4_DATA),
PINMUX_GPIO(GPIO_PTS3, PTS3_DATA),
PINMUX_GPIO(GPIO_PTS2, PTS2_DATA),
PINMUX_GPIO(GPIO_PTS1, PTS1_DATA),
PINMUX_GPIO(GPIO_PTS0, PTS0_DATA),
/* PTT */
PINMUX_GPIO(GPIO_PTT4, PTT4_DATA),
PINMUX_GPIO(GPIO_PTT3, PTT3_DATA),
PINMUX_GPIO(GPIO_PTT2, PTT2_DATA),
PINMUX_GPIO(GPIO_PTT1, PTT1_DATA),
PINMUX_GPIO(GPIO_PTT0, PTT0_DATA),
/* PTU */
PINMUX_GPIO(GPIO_PTU4, PTU4_DATA),
PINMUX_GPIO(GPIO_PTU3, PTU3_DATA),
PINMUX_GPIO(GPIO_PTU2, PTU2_DATA),
PINMUX_GPIO(GPIO_PTU1, PTU1_DATA),
PINMUX_GPIO(GPIO_PTU0, PTU0_DATA),
/* PTV */
PINMUX_GPIO(GPIO_PTV4, PTV4_DATA),
PINMUX_GPIO(GPIO_PTV3, PTV3_DATA),
PINMUX_GPIO(GPIO_PTV2, PTV2_DATA),
PINMUX_GPIO(GPIO_PTV1, PTV1_DATA),
PINMUX_GPIO(GPIO_PTV0, PTV0_DATA),
/* BSC */
PINMUX_GPIO(GPIO_FN_D31, D31_MARK),
PINMUX_GPIO(GPIO_FN_D30, D30_MARK),
PINMUX_GPIO(GPIO_FN_D29, D29_MARK),
PINMUX_GPIO(GPIO_FN_D28, D28_MARK),
PINMUX_GPIO(GPIO_FN_D27, D27_MARK),
PINMUX_GPIO(GPIO_FN_D26, D26_MARK),
PINMUX_GPIO(GPIO_FN_D25, D25_MARK),
PINMUX_GPIO(GPIO_FN_D24, D24_MARK),
PINMUX_GPIO(GPIO_FN_D23, D23_MARK),
PINMUX_GPIO(GPIO_FN_D22, D22_MARK),
PINMUX_GPIO(GPIO_FN_D21, D21_MARK),
PINMUX_GPIO(GPIO_FN_D20, D20_MARK),
PINMUX_GPIO(GPIO_FN_D19, D19_MARK),
PINMUX_GPIO(GPIO_FN_D18, D18_MARK),
PINMUX_GPIO(GPIO_FN_D17, D17_MARK),
PINMUX_GPIO(GPIO_FN_D16, D16_MARK),
PINMUX_GPIO(GPIO_FN_IOIS16, IOIS16_MARK),
PINMUX_GPIO(GPIO_FN_RAS, RAS_MARK),
PINMUX_GPIO(GPIO_FN_CAS, CAS_MARK),
PINMUX_GPIO(GPIO_FN_CKE, CKE_MARK),
PINMUX_GPIO(GPIO_FN_CS5B_CE1A, CS5B_CE1A_MARK),
PINMUX_GPIO(GPIO_FN_CS6B_CE1B, CS6B_CE1B_MARK),
PINMUX_GPIO(GPIO_FN_A25, A25_MARK),
PINMUX_GPIO(GPIO_FN_A24, A24_MARK),
PINMUX_GPIO(GPIO_FN_A23, A23_MARK),
PINMUX_GPIO(GPIO_FN_A22, A22_MARK),
PINMUX_GPIO(GPIO_FN_A21, A21_MARK),
PINMUX_GPIO(GPIO_FN_A20, A20_MARK),
PINMUX_GPIO(GPIO_FN_A19, A19_MARK),
PINMUX_GPIO(GPIO_FN_A0, A0_MARK),
PINMUX_GPIO(GPIO_FN_REFOUT, REFOUT_MARK),
PINMUX_GPIO(GPIO_FN_IRQOUT, IRQOUT_MARK),
/* LCDC */
PINMUX_GPIO(GPIO_FN_LCD_DATA15, LCD_DATA15_MARK),
PINMUX_GPIO(GPIO_FN_LCD_DATA14, LCD_DATA14_MARK),
PINMUX_GPIO(GPIO_FN_LCD_DATA13, LCD_DATA13_MARK),
PINMUX_GPIO(GPIO_FN_LCD_DATA12, LCD_DATA12_MARK),
PINMUX_GPIO(GPIO_FN_LCD_DATA11, LCD_DATA11_MARK),
PINMUX_GPIO(GPIO_FN_LCD_DATA10, LCD_DATA10_MARK),
PINMUX_GPIO(GPIO_FN_LCD_DATA9, LCD_DATA9_MARK),
PINMUX_GPIO(GPIO_FN_LCD_DATA8, LCD_DATA8_MARK),
PINMUX_GPIO(GPIO_FN_LCD_DATA7, LCD_DATA7_MARK),
PINMUX_GPIO(GPIO_FN_LCD_DATA6, LCD_DATA6_MARK),
PINMUX_GPIO(GPIO_FN_LCD_DATA5, LCD_DATA5_MARK),
PINMUX_GPIO(GPIO_FN_LCD_DATA4, LCD_DATA4_MARK),
PINMUX_GPIO(GPIO_FN_LCD_DATA3, LCD_DATA3_MARK),
PINMUX_GPIO(GPIO_FN_LCD_DATA2, LCD_DATA2_MARK),
PINMUX_GPIO(GPIO_FN_LCD_DATA1, LCD_DATA1_MARK),
PINMUX_GPIO(GPIO_FN_LCD_DATA0, LCD_DATA0_MARK),
PINMUX_GPIO(GPIO_FN_LCD_M_DISP, LCD_M_DISP_MARK),
PINMUX_GPIO(GPIO_FN_LCD_CL1, LCD_CL1_MARK),
PINMUX_GPIO(GPIO_FN_LCD_CL2, LCD_CL2_MARK),
PINMUX_GPIO(GPIO_FN_LCD_DON, LCD_DON_MARK),
PINMUX_GPIO(GPIO_FN_LCD_FLM, LCD_FLM_MARK),
PINMUX_GPIO(GPIO_FN_LCD_VEPWC, LCD_VEPWC_MARK),
PINMUX_GPIO(GPIO_FN_LCD_VCPWC, LCD_VCPWC_MARK),
/* AFEIF */
PINMUX_GPIO(GPIO_FN_AFE_RXIN, AFE_RXIN_MARK),
PINMUX_GPIO(GPIO_FN_AFE_RDET, AFE_RDET_MARK),
PINMUX_GPIO(GPIO_FN_AFE_FS, AFE_FS_MARK),
PINMUX_GPIO(GPIO_FN_AFE_TXOUT, AFE_TXOUT_MARK),
PINMUX_GPIO(GPIO_FN_AFE_SCLK, AFE_SCLK_MARK),
PINMUX_GPIO(GPIO_FN_AFE_RLYCNT, AFE_RLYCNT_MARK),
PINMUX_GPIO(GPIO_FN_AFE_HC1, AFE_HC1_MARK),
/* IIC */
PINMUX_GPIO(GPIO_FN_IIC_SCL, IIC_SCL_MARK),
PINMUX_GPIO(GPIO_FN_IIC_SDA, IIC_SDA_MARK),
/* DAC */
PINMUX_GPIO(GPIO_FN_DA1, DA1_MARK),
PINMUX_GPIO(GPIO_FN_DA0, DA0_MARK),
/* ADC */
PINMUX_GPIO(GPIO_FN_AN3, AN3_MARK),
PINMUX_GPIO(GPIO_FN_AN2, AN2_MARK),
PINMUX_GPIO(GPIO_FN_AN1, AN1_MARK),
PINMUX_GPIO(GPIO_FN_AN0, AN0_MARK),
PINMUX_GPIO(GPIO_FN_ADTRG, ADTRG_MARK),
/* USB */
PINMUX_GPIO(GPIO_FN_USB1D_RCV, USB1D_RCV_MARK),
PINMUX_GPIO(GPIO_FN_USB1D_TXSE0, USB1D_TXSE0_MARK),
PINMUX_GPIO(GPIO_FN_USB1D_TXDPLS, USB1D_TXDPLS_MARK),
PINMUX_GPIO(GPIO_FN_USB1D_DMNS, USB1D_DMNS_MARK),
PINMUX_GPIO(GPIO_FN_USB1D_DPLS, USB1D_DPLS_MARK),
PINMUX_GPIO(GPIO_FN_USB1D_SPEED, USB1D_SPEED_MARK),
PINMUX_GPIO(GPIO_FN_USB1D_TXENL, USB1D_TXENL_MARK),
PINMUX_GPIO(GPIO_FN_USB2_PWR_EN, USB2_PWR_EN_MARK),
PINMUX_GPIO(GPIO_FN_USB1_PWR_EN_USBF_UPLUP,
USB1_PWR_EN_USBF_UPLUP_MARK),
PINMUX_GPIO(GPIO_FN_USB1D_SUSPEND, USB1D_SUSPEND_MARK),
/* INTC */
PINMUX_GPIO(GPIO_FN_IRQ5, IRQ5_MARK),
PINMUX_GPIO(GPIO_FN_IRQ4, IRQ4_MARK),
PINMUX_GPIO(GPIO_FN_IRQ3_IRL3, IRQ3_IRL3_MARK),
PINMUX_GPIO(GPIO_FN_IRQ2_IRL2, IRQ2_IRL2_MARK),
PINMUX_GPIO(GPIO_FN_IRQ1_IRL1, IRQ1_IRL1_MARK),
PINMUX_GPIO(GPIO_FN_IRQ0_IRL0, IRQ0_IRL0_MARK),
/* PCC */
PINMUX_GPIO(GPIO_FN_PCC_REG, PCC_REG_MARK),
PINMUX_GPIO(GPIO_FN_PCC_DRV, PCC_DRV_MARK),
PINMUX_GPIO(GPIO_FN_PCC_BVD2, PCC_BVD2_MARK),
PINMUX_GPIO(GPIO_FN_PCC_BVD1, PCC_BVD1_MARK),
PINMUX_GPIO(GPIO_FN_PCC_CD2, PCC_CD2_MARK),
PINMUX_GPIO(GPIO_FN_PCC_CD1, PCC_CD1_MARK),
PINMUX_GPIO(GPIO_FN_PCC_RESET, PCC_RESET_MARK),
PINMUX_GPIO(GPIO_FN_PCC_RDY, PCC_RDY_MARK),
PINMUX_GPIO(GPIO_FN_PCC_VS2, PCC_VS2_MARK),
PINMUX_GPIO(GPIO_FN_PCC_VS1, PCC_VS1_MARK),
/* HUDI */
PINMUX_GPIO(GPIO_FN_AUDATA3, AUDATA3_MARK),
PINMUX_GPIO(GPIO_FN_AUDATA2, AUDATA2_MARK),
PINMUX_GPIO(GPIO_FN_AUDATA1, AUDATA1_MARK),
PINMUX_GPIO(GPIO_FN_AUDATA0, AUDATA0_MARK),
PINMUX_GPIO(GPIO_FN_AUDCK, AUDCK_MARK),
PINMUX_GPIO(GPIO_FN_AUDSYNC, AUDSYNC_MARK),
PINMUX_GPIO(GPIO_FN_ASEBRKAK, ASEBRKAK_MARK),
PINMUX_GPIO(GPIO_FN_TRST, TRST_MARK),
PINMUX_GPIO(GPIO_FN_TMS, TMS_MARK),
PINMUX_GPIO(GPIO_FN_TDO, TDO_MARK),
PINMUX_GPIO(GPIO_FN_TDI, TDI_MARK),
PINMUX_GPIO(GPIO_FN_TCK, TCK_MARK),
/* DMAC */
PINMUX_GPIO(GPIO_FN_DACK1, DACK1_MARK),
PINMUX_GPIO(GPIO_FN_DREQ1, DREQ1_MARK),
PINMUX_GPIO(GPIO_FN_DACK0, DACK0_MARK),
PINMUX_GPIO(GPIO_FN_DREQ0, DREQ0_MARK),
PINMUX_GPIO(GPIO_FN_TEND1, TEND1_MARK),
PINMUX_GPIO(GPIO_FN_TEND0, TEND0_MARK),
/* SIOF0 */
PINMUX_GPIO(GPIO_FN_SIOF0_SYNC, SIOF0_SYNC_MARK),
PINMUX_GPIO(GPIO_FN_SIOF0_MCLK, SIOF0_MCLK_MARK),
PINMUX_GPIO(GPIO_FN_SIOF0_TXD, SIOF0_TXD_MARK),
PINMUX_GPIO(GPIO_FN_SIOF0_RXD, SIOF0_RXD_MARK),
PINMUX_GPIO(GPIO_FN_SIOF0_SCK, SIOF0_SCK_MARK),
/* SIOF1 */
PINMUX_GPIO(GPIO_FN_SIOF1_SYNC, SIOF1_SYNC_MARK),
PINMUX_GPIO(GPIO_FN_SIOF1_MCLK, SIOF1_MCLK_MARK),
PINMUX_GPIO(GPIO_FN_SIOF1_TXD, SIOF1_TXD_MARK),
PINMUX_GPIO(GPIO_FN_SIOF1_RXD, SIOF1_RXD_MARK),
PINMUX_GPIO(GPIO_FN_SIOF1_SCK, SIOF1_SCK_MARK),
/* SCIF0 */
PINMUX_GPIO(GPIO_FN_SCIF0_TXD, SCIF0_TXD_MARK),
PINMUX_GPIO(GPIO_FN_SCIF0_RXD, SCIF0_RXD_MARK),
PINMUX_GPIO(GPIO_FN_SCIF0_RTS, SCIF0_RTS_MARK),
PINMUX_GPIO(GPIO_FN_SCIF0_CTS, SCIF0_CTS_MARK),
PINMUX_GPIO(GPIO_FN_SCIF0_SCK, SCIF0_SCK_MARK),
/* SCIF1 */
PINMUX_GPIO(GPIO_FN_SCIF1_TXD, SCIF1_TXD_MARK),
PINMUX_GPIO(GPIO_FN_SCIF1_RXD, SCIF1_RXD_MARK),
PINMUX_GPIO(GPIO_FN_SCIF1_RTS, SCIF1_RTS_MARK),
PINMUX_GPIO(GPIO_FN_SCIF1_CTS, SCIF1_CTS_MARK),
PINMUX_GPIO(GPIO_FN_SCIF1_SCK, SCIF1_SCK_MARK),
/* TPU */
PINMUX_GPIO(GPIO_FN_TPU_TO1, TPU_TO1_MARK),
PINMUX_GPIO(GPIO_FN_TPU_TO0, TPU_TO0_MARK),
PINMUX_GPIO(GPIO_FN_TPU_TI3B, TPU_TI3B_MARK),
PINMUX_GPIO(GPIO_FN_TPU_TI3A, TPU_TI3A_MARK),
PINMUX_GPIO(GPIO_FN_TPU_TI2B, TPU_TI2B_MARK),
PINMUX_GPIO(GPIO_FN_TPU_TI2A, TPU_TI2A_MARK),
PINMUX_GPIO(GPIO_FN_TPU_TO3, TPU_TO3_MARK),
PINMUX_GPIO(GPIO_FN_TPU_TO2, TPU_TO2_MARK),
/* SIM */
PINMUX_GPIO(GPIO_FN_SIM_D, SIM_D_MARK),
PINMUX_GPIO(GPIO_FN_SIM_CLK, SIM_CLK_MARK),
PINMUX_GPIO(GPIO_FN_SIM_RST, SIM_RST_MARK),
/* MMC */
PINMUX_GPIO(GPIO_FN_MMC_DAT, MMC_DAT_MARK),
PINMUX_GPIO(GPIO_FN_MMC_CMD, MMC_CMD_MARK),
PINMUX_GPIO(GPIO_FN_MMC_CLK, MMC_CLK_MARK),
PINMUX_GPIO(GPIO_FN_MMC_VDDON, MMC_VDDON_MARK),
PINMUX_GPIO(GPIO_FN_MMC_ODMOD, MMC_ODMOD_MARK),
/* SYSC */
PINMUX_GPIO(GPIO_FN_STATUS0, STATUS0_MARK),
PINMUX_GPIO(GPIO_FN_STATUS1, STATUS1_MARK),
};
static struct pinmux_cfg_reg pinmux_config_regs[] = {
{ PINMUX_CFG_REG("PACR", 0xa4050100, 16, 2) {
PTA7_FN, PTA7_OUT, PTA7_IN_PU, PTA7_IN,
PTA6_FN, PTA6_OUT, PTA6_IN_PU, PTA6_IN,
PTA5_FN, PTA5_OUT, PTA5_IN_PU, PTA5_IN,
PTA4_FN, PTA4_OUT, PTA4_IN_PU, PTA4_IN,
PTA3_FN, PTA3_OUT, PTA3_IN_PU, PTA3_IN,
PTA2_FN, PTA2_OUT, PTA2_IN_PU, PTA2_IN,
PTA1_FN, PTA1_OUT, PTA1_IN_PU, PTA1_IN,
PTA0_FN, PTA0_OUT, PTA0_IN_PU, PTA0_IN }
},
{ PINMUX_CFG_REG("PBCR", 0xa4050102, 16, 2) {
PTB7_FN, PTB7_OUT, PTB7_IN_PU, PTB7_IN,
PTB6_FN, PTB6_OUT, PTB6_IN_PU, PTB6_IN,
PTB5_FN, PTB5_OUT, PTB5_IN_PU, PTB5_IN,
PTB4_FN, PTB4_OUT, PTB4_IN_PU, PTB4_IN,
PTB3_FN, PTB3_OUT, PTB3_IN_PU, PTB3_IN,
PTB2_FN, PTB2_OUT, PTB2_IN_PU, PTB2_IN,
PTB1_FN, PTB1_OUT, PTB1_IN_PU, PTB1_IN,
PTB0_FN, PTB0_OUT, PTB0_IN_PU, PTB0_IN }
},
{ PINMUX_CFG_REG("PCCR", 0xa4050104, 16, 2) {
PTC7_FN, PTC7_OUT, PTC7_IN_PU, PTC7_IN,
PTC6_FN, PTC6_OUT, PTC6_IN_PU, PTC6_IN,
PTC5_FN, PTC5_OUT, PTC5_IN_PU, PTC5_IN,
PTC4_FN, PTC4_OUT, PTC4_IN_PU, PTC4_IN,
PTC3_FN, PTC3_OUT, PTC3_IN_PU, PTC3_IN,
PTC2_FN, PTC2_OUT, PTC2_IN_PU, PTC2_IN,
PTC1_FN, PTC1_OUT, PTC1_IN_PU, PTC1_IN,
PTC0_FN, PTC0_OUT, PTC0_IN_PU, PTC0_IN }
},
{ PINMUX_CFG_REG("PDCR", 0xa4050106, 16, 2) {
PTD7_FN, PTD7_OUT, PTD7_IN_PU, PTD7_IN,
PTD6_FN, PTD6_OUT, PTD6_IN_PU, PTD6_IN,
PTD5_FN, PTD5_OUT, PTD5_IN_PU, PTD5_IN,
PTD4_FN, PTD4_OUT, PTD4_IN_PU, PTD4_IN,
PTD3_FN, PTD3_OUT, PTD3_IN_PU, PTD3_IN,
PTD2_FN, PTD2_OUT, PTD2_IN_PU, PTD2_IN,
PTD1_FN, PTD1_OUT, PTD1_IN_PU, PTD1_IN,
PTD0_FN, PTD0_OUT, PTD0_IN_PU, PTD0_IN }
},
{ PINMUX_CFG_REG("PECR", 0xa4050108, 16, 2) {
0, 0, 0, 0,
PTE6_FN, 0, 0, PTE6_IN,
PTE5_FN, 0, 0, PTE5_IN,
PTE4_FN, PTE4_OUT, PTE4_IN_PU, PTE4_IN,
PTE3_FN, PTE3_OUT, PTE3_IN_PU, PTE3_IN,
PTE2_FN, PTE2_OUT, PTE2_IN_PU, PTE2_IN,
PTE1_FN, PTE1_OUT, PTE1_IN_PU, PTE1_IN,
PTE0_FN, PTE0_OUT, PTE0_IN_PU, PTE0_IN }
},
{ PINMUX_CFG_REG("PFCR", 0xa405010a, 16, 2) {
0, 0, 0, 0,
PTF6_FN, 0, 0, PTF6_IN,
PTF5_FN, 0, 0, PTF5_IN,
PTF4_FN, 0, 0, PTF4_IN,
PTF3_FN, 0, 0, PTF3_IN,
PTF2_FN, 0, 0, PTF2_IN,
PTF1_FN, 0, 0, PTF1_IN,
PTF0_FN, 0, 0, PTF0_IN }
},
{ PINMUX_CFG_REG("PGCR", 0xa405010c, 16, 2) {
0, 0, 0, 0,
PTG6_FN, PTG6_OUT, PTG6_IN_PU, PTG6_IN,
PTG5_FN, PTG5_OUT, PTG5_IN_PU, PTG5_IN,
PTG4_FN, PTG4_OUT, PTG4_IN_PU, PTG4_IN,
PTG3_FN, PTG3_OUT, PTG3_IN_PU, PTG3_IN,
PTG2_FN, PTG2_OUT, PTG2_IN_PU, PTG2_IN,
PTG1_FN, PTG1_OUT, PTG1_IN_PU, PTG1_IN,
PTG0_FN, PTG0_OUT, PTG0_IN_PU, PTG0_IN }
},
{ PINMUX_CFG_REG("PHCR", 0xa405010e, 16, 2) {
0, 0, 0, 0,
PTH6_FN, PTH6_OUT, PTH6_IN_PU, PTH6_IN,
PTH5_FN, PTH5_OUT, PTH5_IN_PU, PTH5_IN,
PTH4_FN, PTH4_OUT, PTH4_IN_PU, PTH4_IN,
PTH3_FN, PTH3_OUT, PTH3_IN_PU, PTH3_IN,
PTH2_FN, PTH2_OUT, PTH2_IN_PU, PTH2_IN,
PTH1_FN, PTH1_OUT, PTH1_IN_PU, PTH1_IN,
PTH0_FN, PTH0_OUT, PTH0_IN_PU, PTH0_IN }
},
{ PINMUX_CFG_REG("PJCR", 0xa4050110, 16, 2) {
0, 0, 0, 0,
PTJ6_FN, PTJ6_OUT, PTJ6_IN_PU, PTJ6_IN,
PTJ5_FN, PTJ5_OUT, PTJ5_IN_PU, PTJ5_IN,
PTJ4_FN, PTJ4_OUT, PTJ4_IN_PU, PTJ4_IN,
PTJ3_FN, PTJ3_OUT, PTJ3_IN_PU, PTJ3_IN,
PTJ2_FN, PTJ2_OUT, PTJ2_IN_PU, PTJ2_IN,
PTJ1_FN, PTJ1_OUT, PTJ1_IN_PU, PTJ1_IN,
PTJ0_FN, PTJ0_OUT, PTJ0_IN_PU, PTJ0_IN }
},
{ PINMUX_CFG_REG("PKCR", 0xa4050112, 16, 2) {
0, 0, 0, 0,
0, 0, 0, 0,
0, 0, 0, 0,
0, 0, 0, 0,
PTK3_FN, PTK3_OUT, PTK3_IN_PU, PTK3_IN,
PTK2_FN, PTK2_OUT, PTK2_IN_PU, PTK2_IN,
PTK1_FN, PTK1_OUT, PTK1_IN_PU, PTK1_IN,
PTK0_FN, PTK0_OUT, PTK0_IN_PU, PTK0_IN }
},
{ PINMUX_CFG_REG("PLCR", 0xa4050114, 16, 2) {
PTL7_FN, PTL7_OUT, PTL7_IN_PU, PTL7_IN,
PTL6_FN, PTL6_OUT, PTL6_IN_PU, PTL6_IN,
PTL5_FN, PTL5_OUT, PTL5_IN_PU, PTL5_IN,
PTL4_FN, PTL4_OUT, PTL4_IN_PU, PTL4_IN,
PTL3_FN, PTL3_OUT, PTL3_IN_PU, PTL3_IN,
0, 0, 0, 0,
0, 0, 0, 0,
0, 0, 0, 0 }
},
{ PINMUX_CFG_REG("PMCR", 0xa4050116, 16, 2) {
PTM7_FN, PTM7_OUT, PTM7_IN_PU, PTM7_IN,
PTM6_FN, PTM6_OUT, PTM6_IN_PU, PTM6_IN,
PTM5_FN, PTM5_OUT, PTM5_IN_PU, PTM5_IN,
PTM4_FN, PTM4_OUT, PTM4_IN_PU, PTM4_IN,
PTM3_FN, PTM3_OUT, PTM3_IN_PU, PTM3_IN,
PTM2_FN, PTM2_OUT, PTM2_IN_PU, PTM2_IN,
PTM1_FN, PTM1_OUT, PTM1_IN_PU, PTM1_IN,
PTM0_FN, PTM0_OUT, PTM0_IN_PU, PTM0_IN }
},
{ PINMUX_CFG_REG("PPCR", 0xa4050118, 16, 2) {
0, 0, 0, 0,
0, 0, 0, 0,
0, 0, 0, 0,
PTP4_FN, PTP4_OUT, PTP4_IN_PU, PTP4_IN,
PTP3_FN, PTP3_OUT, PTP3_IN_PU, PTP3_IN,
PTP2_FN, PTP2_OUT, PTP2_IN_PU, PTP2_IN,
PTP1_FN, PTP1_OUT, PTP1_IN_PU, PTP1_IN,
PTP0_FN, PTP0_OUT, PTP0_IN_PU, PTP0_IN }
},
{ PINMUX_CFG_REG("PRCR", 0xa405011a, 16, 2) {
PTR7_FN, PTR7_OUT, PTR7_IN_PU, PTR7_IN,
PTR6_FN, PTR6_OUT, PTR6_IN_PU, PTR6_IN,
PTR5_FN, PTR5_OUT, PTR5_IN_PU, PTR5_IN,
PTR4_FN, PTR4_OUT, PTR4_IN_PU, PTR4_IN,
PTR3_FN, PTR3_OUT, PTR3_IN_PU, PTR3_IN,
PTR2_FN, PTR2_OUT, PTR2_IN_PU, PTR2_IN,
PTR1_FN, PTR1_OUT, PTR1_IN_PU, PTR1_IN,
PTR0_FN, PTR0_OUT, PTR0_IN_PU, PTR0_IN }
},
{ PINMUX_CFG_REG("PSCR", 0xa405011c, 16, 2) {
0, 0, 0, 0,
0, 0, 0, 0,
0, 0, 0, 0,
PTS4_FN, PTS4_OUT, PTS4_IN_PU, PTS4_IN,
PTS3_FN, PTS3_OUT, PTS3_IN_PU, PTS3_IN,
PTS2_FN, PTS2_OUT, PTS2_IN_PU, PTS2_IN,
PTS1_FN, PTS1_OUT, PTS1_IN_PU, PTS1_IN,
PTS0_FN, PTS0_OUT, PTS0_IN_PU, PTS0_IN }
},
{ PINMUX_CFG_REG("PTCR", 0xa405011e, 16, 2) {
0, 0, 0, 0,
0, 0, 0, 0,
0, 0, 0, 0,
PTT4_FN, PTT4_OUT, PTT4_IN_PU, PTT4_IN,
PTT3_FN, PTT3_OUT, PTT3_IN_PU, PTT3_IN,
PTT2_FN, PTT2_OUT, PTT2_IN_PU, PTT2_IN,
PTT1_FN, PTT1_OUT, PTT1_IN_PU, PTT1_IN,
PTT0_FN, PTT0_OUT, PTT0_IN_PU, PTT0_IN }
},
{ PINMUX_CFG_REG("PUCR", 0xa4050120, 16, 2) {
0, 0, 0, 0,
0, 0, 0, 0,
0, 0, 0, 0,
PTU4_FN, PTU4_OUT, PTU4_IN_PU, PTU4_IN,
PTU3_FN, PTU3_OUT, PTU3_IN_PU, PTU3_IN,
PTU2_FN, PTU2_OUT, PTU2_IN_PU, PTU2_IN,
PTU1_FN, PTU1_OUT, PTU1_IN_PU, PTU1_IN,
PTU0_FN, PTU0_OUT, PTU0_IN_PU, PTU0_IN }
},
{ PINMUX_CFG_REG("PVCR", 0xa4050122, 16, 2) {
0, 0, 0, 0,
0, 0, 0, 0,
0, 0, 0, 0,
PTV4_FN, PTV4_OUT, PTV4_IN_PU, PTV4_IN,
PTV3_FN, PTV3_OUT, PTV3_IN_PU, PTV3_IN,
PTV2_FN, PTV2_OUT, PTV2_IN_PU, PTV2_IN,
PTV1_FN, PTV1_OUT, PTV1_IN_PU, PTV1_IN,
PTV0_FN, PTV0_OUT, PTV0_IN_PU, PTV0_IN }
},
{}
};
static struct pinmux_data_reg pinmux_data_regs[] = {
{ PINMUX_DATA_REG("PADR", 0xa4050140, 8) {
PTA7_DATA, PTA6_DATA, PTA5_DATA, PTA4_DATA,
PTA3_DATA, PTA2_DATA, PTA1_DATA, PTA0_DATA }
},
{ PINMUX_DATA_REG("PBDR", 0xa4050142, 8) {
PTB7_DATA, PTB6_DATA, PTB5_DATA, PTB4_DATA,
PTB3_DATA, PTB2_DATA, PTB1_DATA, PTB0_DATA }
},
{ PINMUX_DATA_REG("PCDR", 0xa4050144, 8) {
PTC7_DATA, PTC6_DATA, PTC5_DATA, PTC4_DATA,
PTC3_DATA, PTC2_DATA, PTC1_DATA, PTC0_DATA }
},
{ PINMUX_DATA_REG("PDDR", 0xa4050126, 8) {
PTD7_DATA, PTD6_DATA, PTD5_DATA, PTD4_DATA,
PTD3_DATA, PTD2_DATA, PTD1_DATA, PTD0_DATA }
},
{ PINMUX_DATA_REG("PEDR", 0xa4050148, 8) {
0, PTE6_DATA, PTE5_DATA, PTE4_DATA,
PTE3_DATA, PTE2_DATA, PTE1_DATA, PTE0_DATA }
},
{ PINMUX_DATA_REG("PFDR", 0xa405014a, 8) {
0, PTF6_DATA, PTF5_DATA, PTF4_DATA,
PTF3_DATA, PTF2_DATA, PTF1_DATA, PTF0_DATA }
},
{ PINMUX_DATA_REG("PGDR", 0xa405014c, 8) {
0, PTG6_DATA, PTG5_DATA, PTG4_DATA,
PTG3_DATA, PTG2_DATA, PTG1_DATA, PTG0_DATA }
},
{ PINMUX_DATA_REG("PHDR", 0xa405014e, 8) {
0, PTH6_DATA, PTH5_DATA, PTH4_DATA,
PTH3_DATA, PTH2_DATA, PTH1_DATA, PTH0_DATA }
},
{ PINMUX_DATA_REG("PJDR", 0xa4050150, 8) {
0, PTJ6_DATA, PTJ5_DATA, PTJ4_DATA,
PTJ3_DATA, PTJ2_DATA, PTJ1_DATA, PTJ0_DATA }
},
{ PINMUX_DATA_REG("PKDR", 0xa4050152, 8) {
0, 0, 0, 0,
PTK3_DATA, PTK2_DATA, PTK1_DATA, PTK0_DATA }
},
{ PINMUX_DATA_REG("PLDR", 0xa4050154, 8) {
PTL7_DATA, PTL6_DATA, PTL5_DATA, PTL4_DATA,
PTL3_DATA, 0, 0, 0 }
},
{ PINMUX_DATA_REG("PMDR", 0xa4050156, 8) {
PTM7_DATA, PTM6_DATA, PTM5_DATA, PTM4_DATA,
PTM3_DATA, PTM2_DATA, PTM1_DATA, PTM0_DATA }
},
{ PINMUX_DATA_REG("PPDR", 0xa4050158, 8) {
0, 0, 0, PTP4_DATA,
PTP3_DATA, PTP2_DATA, PTP1_DATA, PTP0_DATA }
},
{ PINMUX_DATA_REG("PRDR", 0xa405015a, 8) {
PTR7_DATA, PTR6_DATA, PTR5_DATA, PTR4_DATA,
PTR3_DATA, PTR2_DATA, PTR1_DATA, PTR0_DATA }
},
{ PINMUX_DATA_REG("PSDR", 0xa405015c, 8) {
0, 0, 0, PTS4_DATA,
PTS3_DATA, PTS2_DATA, PTS1_DATA, PTS0_DATA }
},
{ PINMUX_DATA_REG("PTDR", 0xa405015e, 8) {
0, 0, 0, PTT4_DATA,
PTT3_DATA, PTT2_DATA, PTT1_DATA, PTT0_DATA }
},
{ PINMUX_DATA_REG("PUDR", 0xa4050160, 8) {
0, 0, 0, PTU4_DATA,
PTU3_DATA, PTU2_DATA, PTU1_DATA, PTU0_DATA }
},
{ PINMUX_DATA_REG("PVDR", 0xa4050162, 8) {
0, 0, 0, PTV4_DATA,
PTV3_DATA, PTV2_DATA, PTV1_DATA, PTV0_DATA }
},
{ },
};
static struct pinmux_info sh7720_pinmux_info = {
.name = "sh7720_pfc",
.reserved_id = PINMUX_RESERVED,
.data = { PINMUX_DATA_BEGIN, PINMUX_DATA_END },
.input = { PINMUX_INPUT_BEGIN, PINMUX_INPUT_END },
.input_pu = { PINMUX_INPUT_PULLUP_BEGIN, PINMUX_INPUT_PULLUP_END },
.output = { PINMUX_OUTPUT_BEGIN, PINMUX_OUTPUT_END },
.mark = { PINMUX_MARK_BEGIN, PINMUX_MARK_END },
.function = { PINMUX_FUNCTION_BEGIN, PINMUX_FUNCTION_END },
.first_gpio = GPIO_PTA7,
.last_gpio = GPIO_FN_STATUS1,
.gpios = pinmux_gpios,
.cfg_regs = pinmux_config_regs,
.data_regs = pinmux_data_regs,
.gpio_data = pinmux_data,
.gpio_data_size = ARRAY_SIZE(pinmux_data),
};
static int __init plat_pinmux_setup(void)
{
return register_pinmux(&sh7720_pinmux_info);
}
arch_initcall(plat_pinmux_setup);
View Git Blame Copy Permalink