forked from luck/tmp_suning_uos_patched
f39ca8b488
For hints which may have observable effects, like SEV (send event), we use kprobe_emulate_none which emulates the hint by executing the original instruction. For NOP we simulate the instruction using kprobe_simulate_nop, which does nothing. As probes execute with interrupts disabled this is also used for hints which may block for an indefinite time, like WFE (wait for event). Signed-off-by: Jon Medhurst <tixy@yxit.co.uk> Acked-by: Nicolas Pitre <nicolas.pitre@linaro.org>
582 lines
16 KiB
C
582 lines
16 KiB
C
/*
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* arch/arm/kernel/kprobes-thumb.c
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*
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* Copyright (C) 2011 Jon Medhurst <tixy@yxit.co.uk>.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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#include <linux/kernel.h>
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#include <linux/kprobes.h>
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#include "kprobes.h"
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/*
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* True if current instruction is in an IT block.
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*/
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#define in_it_block(cpsr) ((cpsr & 0x06000c00) != 0x00000000)
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/*
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* Return the condition code to check for the currently executing instruction.
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* This is in ITSTATE<7:4> which is in CPSR<15:12> but is only valid if
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* in_it_block returns true.
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*/
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#define current_cond(cpsr) ((cpsr >> 12) & 0xf)
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/*
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* Return the PC value for a probe in thumb code.
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* This is the address of the probed instruction plus 4.
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* We subtract one because the address will have bit zero set to indicate
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* a pointer to thumb code.
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*/
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static inline unsigned long __kprobes thumb_probe_pc(struct kprobe *p)
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{
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return (unsigned long)p->addr - 1 + 4;
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}
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static const union decode_item t32_table_1111_0xxx___1[] = {
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/* Branches and miscellaneous control */
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/* YIELD 1111 0011 1010 xxxx 10x0 x000 0000 0001 */
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DECODE_OR (0xfff0d7ff, 0xf3a08001),
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/* SEV 1111 0011 1010 xxxx 10x0 x000 0000 0100 */
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DECODE_EMULATE (0xfff0d7ff, 0xf3a08004, kprobe_emulate_none),
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/* NOP 1111 0011 1010 xxxx 10x0 x000 0000 0000 */
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/* WFE 1111 0011 1010 xxxx 10x0 x000 0000 0010 */
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/* WFI 1111 0011 1010 xxxx 10x0 x000 0000 0011 */
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DECODE_SIMULATE (0xfff0d7fc, 0xf3a08000, kprobe_simulate_nop),
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DECODE_END
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};
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const union decode_item kprobe_decode_thumb32_table[] = {
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/*
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* Branches and miscellaneous control
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* 1111 0xxx xxxx xxxx 1xxx xxxx xxxx xxxx
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*/
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DECODE_TABLE (0xf8008000, 0xf0008000, t32_table_1111_0xxx___1),
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DECODE_END
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};
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static void __kprobes
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t16_simulate_bxblx(struct kprobe *p, struct pt_regs *regs)
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{
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kprobe_opcode_t insn = p->opcode;
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unsigned long pc = thumb_probe_pc(p);
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int rm = (insn >> 3) & 0xf;
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unsigned long rmv = (rm == 15) ? pc : regs->uregs[rm];
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if (insn & (1 << 7)) /* BLX ? */
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regs->ARM_lr = (unsigned long)p->addr + 2;
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bx_write_pc(rmv, regs);
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}
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static void __kprobes
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t16_simulate_ldr_literal(struct kprobe *p, struct pt_regs *regs)
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{
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kprobe_opcode_t insn = p->opcode;
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unsigned long* base = (unsigned long *)(thumb_probe_pc(p) & ~3);
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long index = insn & 0xff;
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int rt = (insn >> 8) & 0x7;
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regs->uregs[rt] = base[index];
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}
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static void __kprobes
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t16_simulate_ldrstr_sp_relative(struct kprobe *p, struct pt_regs *regs)
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{
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kprobe_opcode_t insn = p->opcode;
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unsigned long* base = (unsigned long *)regs->ARM_sp;
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long index = insn & 0xff;
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int rt = (insn >> 8) & 0x7;
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if (insn & 0x800) /* LDR */
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regs->uregs[rt] = base[index];
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else /* STR */
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base[index] = regs->uregs[rt];
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}
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static void __kprobes
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t16_simulate_reladr(struct kprobe *p, struct pt_regs *regs)
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{
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kprobe_opcode_t insn = p->opcode;
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unsigned long base = (insn & 0x800) ? regs->ARM_sp
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: (thumb_probe_pc(p) & ~3);
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long offset = insn & 0xff;
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int rt = (insn >> 8) & 0x7;
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regs->uregs[rt] = base + offset * 4;
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}
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static void __kprobes
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t16_simulate_add_sp_imm(struct kprobe *p, struct pt_regs *regs)
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{
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kprobe_opcode_t insn = p->opcode;
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long imm = insn & 0x7f;
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if (insn & 0x80) /* SUB */
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regs->ARM_sp -= imm * 4;
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else /* ADD */
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regs->ARM_sp += imm * 4;
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}
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static void __kprobes
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t16_simulate_cbz(struct kprobe *p, struct pt_regs *regs)
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{
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kprobe_opcode_t insn = p->opcode;
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int rn = insn & 0x7;
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kprobe_opcode_t nonzero = regs->uregs[rn] ? insn : ~insn;
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if (nonzero & 0x800) {
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long i = insn & 0x200;
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long imm5 = insn & 0xf8;
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unsigned long pc = thumb_probe_pc(p);
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regs->ARM_pc = pc + (i >> 3) + (imm5 >> 2);
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}
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}
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static void __kprobes
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t16_simulate_it(struct kprobe *p, struct pt_regs *regs)
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{
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/*
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* The 8 IT state bits are split into two parts in CPSR:
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* ITSTATE<1:0> are in CPSR<26:25>
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* ITSTATE<7:2> are in CPSR<15:10>
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* The new IT state is in the lower byte of insn.
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*/
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kprobe_opcode_t insn = p->opcode;
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unsigned long cpsr = regs->ARM_cpsr;
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cpsr &= ~PSR_IT_MASK;
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cpsr |= (insn & 0xfc) << 8;
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cpsr |= (insn & 0x03) << 25;
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regs->ARM_cpsr = cpsr;
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}
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static void __kprobes
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t16_singlestep_it(struct kprobe *p, struct pt_regs *regs)
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{
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regs->ARM_pc += 2;
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t16_simulate_it(p, regs);
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}
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static enum kprobe_insn __kprobes
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t16_decode_it(kprobe_opcode_t insn, struct arch_specific_insn *asi)
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{
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asi->insn_singlestep = t16_singlestep_it;
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return INSN_GOOD_NO_SLOT;
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}
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static void __kprobes
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t16_simulate_cond_branch(struct kprobe *p, struct pt_regs *regs)
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{
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kprobe_opcode_t insn = p->opcode;
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unsigned long pc = thumb_probe_pc(p);
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long offset = insn & 0x7f;
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offset -= insn & 0x80; /* Apply sign bit */
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regs->ARM_pc = pc + (offset * 2);
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}
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static enum kprobe_insn __kprobes
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t16_decode_cond_branch(kprobe_opcode_t insn, struct arch_specific_insn *asi)
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{
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int cc = (insn >> 8) & 0xf;
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asi->insn_check_cc = kprobe_condition_checks[cc];
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asi->insn_handler = t16_simulate_cond_branch;
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return INSN_GOOD_NO_SLOT;
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}
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static void __kprobes
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t16_simulate_branch(struct kprobe *p, struct pt_regs *regs)
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{
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kprobe_opcode_t insn = p->opcode;
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unsigned long pc = thumb_probe_pc(p);
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long offset = insn & 0x3ff;
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offset -= insn & 0x400; /* Apply sign bit */
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regs->ARM_pc = pc + (offset * 2);
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}
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static unsigned long __kprobes
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t16_emulate_loregs(struct kprobe *p, struct pt_regs *regs)
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{
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unsigned long oldcpsr = regs->ARM_cpsr;
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unsigned long newcpsr;
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__asm__ __volatile__ (
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"msr cpsr_fs, %[oldcpsr] \n\t"
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"ldmia %[regs], {r0-r7} \n\t"
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"blx %[fn] \n\t"
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"stmia %[regs], {r0-r7} \n\t"
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"mrs %[newcpsr], cpsr \n\t"
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: [newcpsr] "=r" (newcpsr)
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: [oldcpsr] "r" (oldcpsr), [regs] "r" (regs),
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[fn] "r" (p->ainsn.insn_fn)
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: "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
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"lr", "memory", "cc"
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);
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return (oldcpsr & ~APSR_MASK) | (newcpsr & APSR_MASK);
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}
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static void __kprobes
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t16_emulate_loregs_rwflags(struct kprobe *p, struct pt_regs *regs)
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{
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regs->ARM_cpsr = t16_emulate_loregs(p, regs);
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}
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static void __kprobes
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t16_emulate_loregs_noitrwflags(struct kprobe *p, struct pt_regs *regs)
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{
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unsigned long cpsr = t16_emulate_loregs(p, regs);
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if (!in_it_block(cpsr))
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regs->ARM_cpsr = cpsr;
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}
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static void __kprobes
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t16_emulate_hiregs(struct kprobe *p, struct pt_regs *regs)
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{
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kprobe_opcode_t insn = p->opcode;
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unsigned long pc = thumb_probe_pc(p);
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int rdn = (insn & 0x7) | ((insn & 0x80) >> 4);
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int rm = (insn >> 3) & 0xf;
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register unsigned long rdnv asm("r1");
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register unsigned long rmv asm("r0");
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unsigned long cpsr = regs->ARM_cpsr;
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rdnv = (rdn == 15) ? pc : regs->uregs[rdn];
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rmv = (rm == 15) ? pc : regs->uregs[rm];
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__asm__ __volatile__ (
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"msr cpsr_fs, %[cpsr] \n\t"
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"blx %[fn] \n\t"
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"mrs %[cpsr], cpsr \n\t"
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: "=r" (rdnv), [cpsr] "=r" (cpsr)
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: "0" (rdnv), "r" (rmv), "1" (cpsr), [fn] "r" (p->ainsn.insn_fn)
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: "lr", "memory", "cc"
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);
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if (rdn == 15)
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rdnv &= ~1;
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regs->uregs[rdn] = rdnv;
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regs->ARM_cpsr = (regs->ARM_cpsr & ~APSR_MASK) | (cpsr & APSR_MASK);
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}
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static enum kprobe_insn __kprobes
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t16_decode_hiregs(kprobe_opcode_t insn, struct arch_specific_insn *asi)
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{
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insn &= ~0x00ff;
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insn |= 0x001; /* Set Rdn = R1 and Rm = R0 */
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((u16 *)asi->insn)[0] = insn;
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asi->insn_handler = t16_emulate_hiregs;
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return INSN_GOOD;
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}
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static void __kprobes
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t16_emulate_push(struct kprobe *p, struct pt_regs *regs)
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{
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__asm__ __volatile__ (
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"ldr r9, [%[regs], #13*4] \n\t"
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"ldr r8, [%[regs], #14*4] \n\t"
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"ldmia %[regs], {r0-r7} \n\t"
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"blx %[fn] \n\t"
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"str r9, [%[regs], #13*4] \n\t"
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:
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: [regs] "r" (regs), [fn] "r" (p->ainsn.insn_fn)
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: "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7", "r8", "r9",
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"lr", "memory", "cc"
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);
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}
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static enum kprobe_insn __kprobes
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t16_decode_push(kprobe_opcode_t insn, struct arch_specific_insn *asi)
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{
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/*
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* To simulate a PUSH we use a Thumb-2 "STMDB R9!, {registers}"
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* and call it with R9=SP and LR in the register list represented
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* by R8.
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*/
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((u16 *)asi->insn)[0] = 0xe929; /* 1st half STMDB R9!,{} */
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((u16 *)asi->insn)[1] = insn & 0x1ff; /* 2nd half (register list) */
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asi->insn_handler = t16_emulate_push;
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return INSN_GOOD;
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}
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static void __kprobes
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t16_emulate_pop_nopc(struct kprobe *p, struct pt_regs *regs)
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{
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__asm__ __volatile__ (
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"ldr r9, [%[regs], #13*4] \n\t"
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"ldmia %[regs], {r0-r7} \n\t"
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"blx %[fn] \n\t"
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"stmia %[regs], {r0-r7} \n\t"
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"str r9, [%[regs], #13*4] \n\t"
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:
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: [regs] "r" (regs), [fn] "r" (p->ainsn.insn_fn)
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: "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7", "r9",
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"lr", "memory", "cc"
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);
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}
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static void __kprobes
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t16_emulate_pop_pc(struct kprobe *p, struct pt_regs *regs)
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{
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register unsigned long pc asm("r8");
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__asm__ __volatile__ (
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"ldr r9, [%[regs], #13*4] \n\t"
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"ldmia %[regs], {r0-r7} \n\t"
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"blx %[fn] \n\t"
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"stmia %[regs], {r0-r7} \n\t"
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"str r9, [%[regs], #13*4] \n\t"
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: "=r" (pc)
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: [regs] "r" (regs), [fn] "r" (p->ainsn.insn_fn)
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: "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7", "r9",
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"lr", "memory", "cc"
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);
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bx_write_pc(pc, regs);
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}
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static enum kprobe_insn __kprobes
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t16_decode_pop(kprobe_opcode_t insn, struct arch_specific_insn *asi)
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{
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/*
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* To simulate a POP we use a Thumb-2 "LDMDB R9!, {registers}"
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* and call it with R9=SP and PC in the register list represented
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* by R8.
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*/
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((u16 *)asi->insn)[0] = 0xe8b9; /* 1st half LDMIA R9!,{} */
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((u16 *)asi->insn)[1] = insn & 0x1ff; /* 2nd half (register list) */
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asi->insn_handler = insn & 0x100 ? t16_emulate_pop_pc
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: t16_emulate_pop_nopc;
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return INSN_GOOD;
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}
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static const union decode_item t16_table_1011[] = {
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/* Miscellaneous 16-bit instructions */
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/* ADD (SP plus immediate) 1011 0000 0xxx xxxx */
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/* SUB (SP minus immediate) 1011 0000 1xxx xxxx */
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DECODE_SIMULATE (0xff00, 0xb000, t16_simulate_add_sp_imm),
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/* CBZ 1011 00x1 xxxx xxxx */
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/* CBNZ 1011 10x1 xxxx xxxx */
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DECODE_SIMULATE (0xf500, 0xb100, t16_simulate_cbz),
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/* SXTH 1011 0010 00xx xxxx */
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/* SXTB 1011 0010 01xx xxxx */
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/* UXTH 1011 0010 10xx xxxx */
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/* UXTB 1011 0010 11xx xxxx */
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/* REV 1011 1010 00xx xxxx */
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/* REV16 1011 1010 01xx xxxx */
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/* ??? 1011 1010 10xx xxxx */
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/* REVSH 1011 1010 11xx xxxx */
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DECODE_REJECT (0xffc0, 0xba80),
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DECODE_EMULATE (0xf500, 0xb000, t16_emulate_loregs_rwflags),
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/* PUSH 1011 010x xxxx xxxx */
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DECODE_CUSTOM (0xfe00, 0xb400, t16_decode_push),
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/* POP 1011 110x xxxx xxxx */
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DECODE_CUSTOM (0xfe00, 0xbc00, t16_decode_pop),
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/*
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* If-Then, and hints
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* 1011 1111 xxxx xxxx
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*/
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/* YIELD 1011 1111 0001 0000 */
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DECODE_OR (0xffff, 0xbf10),
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/* SEV 1011 1111 0100 0000 */
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DECODE_EMULATE (0xffff, 0xbf40, kprobe_emulate_none),
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/* NOP 1011 1111 0000 0000 */
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/* WFE 1011 1111 0010 0000 */
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/* WFI 1011 1111 0011 0000 */
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DECODE_SIMULATE (0xffcf, 0xbf00, kprobe_simulate_nop),
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/* Unassigned hints 1011 1111 xxxx 0000 */
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DECODE_REJECT (0xff0f, 0xbf00),
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/* IT 1011 1111 xxxx xxxx */
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DECODE_CUSTOM (0xff00, 0xbf00, t16_decode_it),
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/* SETEND 1011 0110 010x xxxx */
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/* CPS 1011 0110 011x xxxx */
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/* BKPT 1011 1110 xxxx xxxx */
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/* And unallocated instructions... */
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DECODE_END
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};
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const union decode_item kprobe_decode_thumb16_table[] = {
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/*
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* Shift (immediate), add, subtract, move, and compare
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* 00xx xxxx xxxx xxxx
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*/
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/* CMP (immediate) 0010 1xxx xxxx xxxx */
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DECODE_EMULATE (0xf800, 0x2800, t16_emulate_loregs_rwflags),
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/* ADD (register) 0001 100x xxxx xxxx */
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/* SUB (register) 0001 101x xxxx xxxx */
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/* LSL (immediate) 0000 0xxx xxxx xxxx */
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/* LSR (immediate) 0000 1xxx xxxx xxxx */
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/* ASR (immediate) 0001 0xxx xxxx xxxx */
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/* ADD (immediate, Thumb) 0001 110x xxxx xxxx */
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/* SUB (immediate, Thumb) 0001 111x xxxx xxxx */
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/* MOV (immediate) 0010 0xxx xxxx xxxx */
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/* ADD (immediate, Thumb) 0011 0xxx xxxx xxxx */
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/* SUB (immediate, Thumb) 0011 1xxx xxxx xxxx */
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DECODE_EMULATE (0xc000, 0x0000, t16_emulate_loregs_noitrwflags),
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/*
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* 16-bit Thumb data-processing instructions
|
|
* 0100 00xx xxxx xxxx
|
|
*/
|
|
|
|
/* TST (register) 0100 0010 00xx xxxx */
|
|
DECODE_EMULATE (0xffc0, 0x4200, t16_emulate_loregs_rwflags),
|
|
/* CMP (register) 0100 0010 10xx xxxx */
|
|
/* CMN (register) 0100 0010 11xx xxxx */
|
|
DECODE_EMULATE (0xff80, 0x4280, t16_emulate_loregs_rwflags),
|
|
/* AND (register) 0100 0000 00xx xxxx */
|
|
/* EOR (register) 0100 0000 01xx xxxx */
|
|
/* LSL (register) 0100 0000 10xx xxxx */
|
|
/* LSR (register) 0100 0000 11xx xxxx */
|
|
/* ASR (register) 0100 0001 00xx xxxx */
|
|
/* ADC (register) 0100 0001 01xx xxxx */
|
|
/* SBC (register) 0100 0001 10xx xxxx */
|
|
/* ROR (register) 0100 0001 11xx xxxx */
|
|
/* RSB (immediate) 0100 0010 01xx xxxx */
|
|
/* ORR (register) 0100 0011 00xx xxxx */
|
|
/* MUL 0100 0011 00xx xxxx */
|
|
/* BIC (register) 0100 0011 10xx xxxx */
|
|
/* MVN (register) 0100 0011 10xx xxxx */
|
|
DECODE_EMULATE (0xfc00, 0x4000, t16_emulate_loregs_noitrwflags),
|
|
|
|
/*
|
|
* Special data instructions and branch and exchange
|
|
* 0100 01xx xxxx xxxx
|
|
*/
|
|
|
|
/* BLX pc 0100 0111 1111 1xxx */
|
|
DECODE_REJECT (0xfff8, 0x47f8),
|
|
|
|
/* BX (register) 0100 0111 0xxx xxxx */
|
|
/* BLX (register) 0100 0111 1xxx xxxx */
|
|
DECODE_SIMULATE (0xff00, 0x4700, t16_simulate_bxblx),
|
|
|
|
/* ADD pc, pc 0100 0100 1111 1111 */
|
|
DECODE_REJECT (0xffff, 0x44ff),
|
|
|
|
/* ADD (register) 0100 0100 xxxx xxxx */
|
|
/* CMP (register) 0100 0101 xxxx xxxx */
|
|
/* MOV (register) 0100 0110 xxxx xxxx */
|
|
DECODE_CUSTOM (0xfc00, 0x4400, t16_decode_hiregs),
|
|
|
|
/*
|
|
* Load from Literal Pool
|
|
* LDR (literal) 0100 1xxx xxxx xxxx
|
|
*/
|
|
DECODE_SIMULATE (0xf800, 0x4800, t16_simulate_ldr_literal),
|
|
|
|
/*
|
|
* 16-bit Thumb Load/store instructions
|
|
* 0101 xxxx xxxx xxxx
|
|
* 011x xxxx xxxx xxxx
|
|
* 100x xxxx xxxx xxxx
|
|
*/
|
|
|
|
/* STR (register) 0101 000x xxxx xxxx */
|
|
/* STRH (register) 0101 001x xxxx xxxx */
|
|
/* STRB (register) 0101 010x xxxx xxxx */
|
|
/* LDRSB (register) 0101 011x xxxx xxxx */
|
|
/* LDR (register) 0101 100x xxxx xxxx */
|
|
/* LDRH (register) 0101 101x xxxx xxxx */
|
|
/* LDRB (register) 0101 110x xxxx xxxx */
|
|
/* LDRSH (register) 0101 111x xxxx xxxx */
|
|
/* STR (immediate, Thumb) 0110 0xxx xxxx xxxx */
|
|
/* LDR (immediate, Thumb) 0110 1xxx xxxx xxxx */
|
|
/* STRB (immediate, Thumb) 0111 0xxx xxxx xxxx */
|
|
/* LDRB (immediate, Thumb) 0111 1xxx xxxx xxxx */
|
|
DECODE_EMULATE (0xc000, 0x4000, t16_emulate_loregs_rwflags),
|
|
/* STRH (immediate, Thumb) 1000 0xxx xxxx xxxx */
|
|
/* LDRH (immediate, Thumb) 1000 1xxx xxxx xxxx */
|
|
DECODE_EMULATE (0xf000, 0x8000, t16_emulate_loregs_rwflags),
|
|
/* STR (immediate, Thumb) 1001 0xxx xxxx xxxx */
|
|
/* LDR (immediate, Thumb) 1001 1xxx xxxx xxxx */
|
|
DECODE_SIMULATE (0xf000, 0x9000, t16_simulate_ldrstr_sp_relative),
|
|
|
|
/*
|
|
* Generate PC-/SP-relative address
|
|
* ADR (literal) 1010 0xxx xxxx xxxx
|
|
* ADD (SP plus immediate) 1010 1xxx xxxx xxxx
|
|
*/
|
|
DECODE_SIMULATE (0xf000, 0xa000, t16_simulate_reladr),
|
|
|
|
/*
|
|
* Miscellaneous 16-bit instructions
|
|
* 1011 xxxx xxxx xxxx
|
|
*/
|
|
DECODE_TABLE (0xf000, 0xb000, t16_table_1011),
|
|
|
|
/* STM 1100 0xxx xxxx xxxx */
|
|
/* LDM 1100 1xxx xxxx xxxx */
|
|
DECODE_EMULATE (0xf000, 0xc000, t16_emulate_loregs_rwflags),
|
|
|
|
/*
|
|
* Conditional branch, and Supervisor Call
|
|
*/
|
|
|
|
/* Permanently UNDEFINED 1101 1110 xxxx xxxx */
|
|
/* SVC 1101 1111 xxxx xxxx */
|
|
DECODE_REJECT (0xfe00, 0xde00),
|
|
|
|
/* Conditional branch 1101 xxxx xxxx xxxx */
|
|
DECODE_CUSTOM (0xf000, 0xd000, t16_decode_cond_branch),
|
|
|
|
/*
|
|
* Unconditional branch
|
|
* B 1110 0xxx xxxx xxxx
|
|
*/
|
|
DECODE_SIMULATE (0xf800, 0xe000, t16_simulate_branch),
|
|
|
|
DECODE_END
|
|
};
|
|
|
|
static unsigned long __kprobes thumb_check_cc(unsigned long cpsr)
|
|
{
|
|
if (unlikely(in_it_block(cpsr)))
|
|
return kprobe_condition_checks[current_cond(cpsr)](cpsr);
|
|
return true;
|
|
}
|
|
|
|
static void __kprobes thumb16_singlestep(struct kprobe *p, struct pt_regs *regs)
|
|
{
|
|
regs->ARM_pc += 2;
|
|
p->ainsn.insn_handler(p, regs);
|
|
regs->ARM_cpsr = it_advance(regs->ARM_cpsr);
|
|
}
|
|
|
|
static void __kprobes thumb32_singlestep(struct kprobe *p, struct pt_regs *regs)
|
|
{
|
|
regs->ARM_pc += 4;
|
|
p->ainsn.insn_handler(p, regs);
|
|
regs->ARM_cpsr = it_advance(regs->ARM_cpsr);
|
|
}
|
|
|
|
enum kprobe_insn __kprobes
|
|
thumb16_kprobe_decode_insn(kprobe_opcode_t insn, struct arch_specific_insn *asi)
|
|
{
|
|
asi->insn_singlestep = thumb16_singlestep;
|
|
asi->insn_check_cc = thumb_check_cc;
|
|
return kprobe_decode_insn(insn, asi, kprobe_decode_thumb16_table, true);
|
|
}
|
|
|
|
enum kprobe_insn __kprobes
|
|
thumb32_kprobe_decode_insn(kprobe_opcode_t insn, struct arch_specific_insn *asi)
|
|
{
|
|
asi->insn_singlestep = thumb32_singlestep;
|
|
asi->insn_check_cc = thumb_check_cc;
|
|
return kprobe_decode_insn(insn, asi, kprobe_decode_thumb32_table, true);
|
|
}
|