Linus Walleij 4166a56aa8 ARM/dmaengine: pl08x: pass reasonable memcpy settings ... We cannot use bits from configuration registers as API between platforms and driver like this, abstract it out to two enums and mimic the stuff passed as device tree data. This is done to make it possible for the driver to generate the ccfg word on-the-fly so we can support more PL08x derivatives. Acked-by: Olof Johansson <olof@lixom.net> Acked-by: Arnd Bergmann <arnd@arndb.de> Signed-off-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Vinod Koul <vinod.koul@intel.com>		2017-05-24 09:44:32 +05:30
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include/mach	ARM: lpc32xx: remove unused header file mach/irqs.h	2016-10-25 13:33:01 -04:00
common.c	ARM: lpc32xx: remove leftovers of legacy clock source and provider drivers	2016-04-28 00:45:01 +03:00
common.h	ARM: lpc32xx: remove unused header file mach/irqs.h	2016-10-25 13:33:01 -04:00
Makefile	ARM: lpc32xx: remove legacy irq controller driver	2016-05-24 19:32:45 +00:00
Makefile.boot
phy3250.c	ARM/dmaengine: pl08x: pass reasonable memcpy settings	2017-05-24 09:44:32 +05:30
pm.c	ARM: lpc32xx: remove unused header file clock.h	2016-10-25 13:33:01 -04:00
serial.c	arm: lpc32xx: switch to common clock framework	2016-02-11 02:24:53 +02:00
suspend.S