forked from luck/tmp_suning_uos_patched
292b293cee
PPI handling is a bit of an odd beast. It uses its own low level handling code and is hardwired to the local timers (hence lacking a registration interface). Instead, switch the low handling to the normal SPI handling code. PPIs are handled by the handle_percpu_devid_irq flow. This also allows the removal of some duplicated code. Cc: Kukjin Kim <kgene.kim@samsung.com> Cc: David Brown <davidb@codeaurora.org> Cc: Bryan Huntsman <bryanh@codeaurora.org> Cc: Tony Lindgren <tony@atomide.com> Cc: Paul Mundt <lethal@linux-sh.org> Cc: Magnus Damm <magnus.damm@gmail.com> Cc: Thomas Gleixner <tglx@linutronix.de> Acked-by: David Brown <davidb@codeaurora.org> Tested-by: David Brown <davidb@codeaurora.org> Tested-by: Shawn Guo <shawn.guo@linaro.org> Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
40 lines
705 B
ArmAsm
40 lines
705 B
ArmAsm
#include <asm/assembler.h>
|
|
|
|
/*
|
|
* Interrupt handling. Preserves r7, r8, r9
|
|
*/
|
|
.macro arch_irq_handler_default
|
|
get_irqnr_preamble r6, lr
|
|
1: get_irqnr_and_base r0, r2, r6, lr
|
|
movne r1, sp
|
|
@
|
|
@ routine called with r0 = irq number, r1 = struct pt_regs *
|
|
@
|
|
adrne lr, BSYM(1b)
|
|
bne asm_do_IRQ
|
|
|
|
#ifdef CONFIG_SMP
|
|
/*
|
|
* XXX
|
|
*
|
|
* this macro assumes that irqstat (r2) and base (r6) are
|
|
* preserved from get_irqnr_and_base above
|
|
*/
|
|
ALT_SMP(test_for_ipi r0, r2, r6, lr)
|
|
ALT_UP_B(9997f)
|
|
movne r1, sp
|
|
adrne lr, BSYM(1b)
|
|
bne do_IPI
|
|
#endif
|
|
9997:
|
|
.endm
|
|
|
|
.macro arch_irq_handler, symbol_name
|
|
.align 5
|
|
.global \symbol_name
|
|
\symbol_name:
|
|
mov r8, lr
|
|
arch_irq_handler_default
|
|
mov pc, r8
|
|
.endm
|