forked from luck/tmp_suning_uos_patched
e206da0bb3
Switch to platform style configuration for 527x ColdFire parts. Initial support is for the UARTs. DMA support moved to common code for all ColdFire parts. Signed-off-by: Greg Ungerer <gerg@uclinux.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
133 lines
3.3 KiB
C
133 lines
3.3 KiB
C
/***************************************************************************/
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/*
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* linux/arch/m68knommu/platform/527x/config.c
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*
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* Sub-architcture dependant initialization code for the Freescale
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* 5270/5271 CPUs.
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*
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* Copyright (C) 1999-2004, Greg Ungerer (gerg@snapgear.com)
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* Copyright (C) 2001-2004, SnapGear Inc. (www.snapgear.com)
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*/
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/***************************************************************************/
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#include <linux/kernel.h>
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#include <linux/param.h>
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#include <linux/init.h>
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#include <linux/interrupt.h>
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#include <linux/io.h>
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#include <asm/machdep.h>
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#include <asm/coldfire.h>
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#include <asm/mcfsim.h>
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#include <asm/mcfuart.h>
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/***************************************************************************/
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void coldfire_reset(void);
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/***************************************************************************/
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static struct mcf_platform_uart m527x_uart_platform[] = {
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{
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.mapbase = MCF_MBAR + MCFUART_BASE1,
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.irq = MCFINT_VECBASE + MCFINT_UART0,
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},
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{
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.mapbase = MCF_MBAR + MCFUART_BASE2,
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.irq = MCFINT_VECBASE + MCFINT_UART1,
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},
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{
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.mapbase = MCF_MBAR + MCFUART_BASE3,
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.irq = MCFINT_VECBASE + MCFINT_UART2,
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},
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{ },
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};
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static struct platform_device m527x_uart = {
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.name = "mcfuart",
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.id = 0,
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.dev.platform_data = m527x_uart_platform,
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};
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static struct platform_device *m527x_devices[] __initdata = {
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&m527x_uart,
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};
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/***************************************************************************/
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#define INTC0 (MCF_MBAR + MCFICM_INTC0)
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static void __init m527x_uart_init_line(int line, int irq)
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{
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u16 sepmask;
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u32 imr;
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if ((line < 0) || (line > 2))
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return;
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/* level 6, line based priority */
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writeb(0x30+line, INTC0 + MCFINTC_ICR0 + MCFINT_UART0 + line);
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imr = readl(INTC0 + MCFINTC_IMRL);
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imr &= ~((1 << (irq - MCFINT_VECBASE)) | 1);
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writel(imr, INTC0 + MCFINTC_IMRL);
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/*
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* External Pin Mask Setting & Enable External Pin for Interface
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*/
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sepmask = readw(MCF_IPSBAR + MCF_GPIO_PAR_UART);
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if (line == 0)
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sepmask |= UART0_ENABLE_MASK;
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else if (line == 1)
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sepmask |= UART1_ENABLE_MASK;
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else if (line == 2)
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sepmask |= UART2_ENABLE_MASK;
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writew(sepmask, MCF_IPSBAR + MCF_GPIO_PAR_UART);
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}
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static void __init m527x_uarts_init(void)
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{
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const int nrlines = ARRAY_SIZE(m527x_uart_platform);
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int line;
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for (line = 0; (line < nrlines); line++)
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m527x_uart_init_line(line, m527x_uart_platform[line].irq);
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}
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/***************************************************************************/
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void mcf_disableall(void)
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{
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*((volatile unsigned long *) (MCF_IPSBAR + MCFICM_INTC0 + MCFINTC_IMRH)) = 0xffffffff;
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*((volatile unsigned long *) (MCF_IPSBAR + MCFICM_INTC0 + MCFINTC_IMRL)) = 0xffffffff;
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}
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/***************************************************************************/
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void mcf_autovector(unsigned int vec)
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{
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/* Everything is auto-vectored on the 5272 */
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}
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/***************************************************************************/
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void __init config_BSP(char *commandp, int size)
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{
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mcf_disableall();
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mach_reset = coldfire_reset;
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}
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/***************************************************************************/
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static int __init init_BSP(void)
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{
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m527x_uarts_init();
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platform_add_devices(m527x_devices, ARRAY_SIZE(m527x_devices));
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return 0;
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}
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arch_initcall(init_BSP);
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/***************************************************************************/
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