forked from luck/tmp_suning_uos_patched
f0b8b3417d
The registers that describe size supported by TLB are different on MMU v2 as well as we support power of two page sizes. For now we continue to assume that FSL variable size array supports all page sizes up to the maximum one reported in TLB1PS. Signed-off-by: Kumar Gala <galak@kernel.crashing.org> |
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.. | ||
40x_mmu.c | ||
44x_mmu.c | ||
dma-noncoherent.c | ||
fault.c | ||
fsl_booke_mmu.c | ||
gup.c | ||
hash_low_32.S | ||
hash_low_64.S | ||
hash_native_64.c | ||
hash_utils_64.c | ||
highmem.c | ||
hugetlbpage-book3e.c | ||
hugetlbpage-hash64.c | ||
hugetlbpage.c | ||
icswx_pid.c | ||
icswx.c | ||
icswx.h | ||
init_32.c | ||
init_64.c | ||
Makefile | ||
mem.c | ||
mmap_64.c | ||
mmu_context_hash32.c | ||
mmu_context_hash64.c | ||
mmu_context_nohash.c | ||
mmu_decl.h | ||
numa.c | ||
pgtable_32.c | ||
pgtable_64.c | ||
pgtable.c | ||
ppc_mmu_32.c | ||
slb_low.S | ||
slb.c | ||
slice.c | ||
stab.c | ||
subpage-prot.c | ||
tlb_hash32.c | ||
tlb_hash64.c | ||
tlb_low_64e.S | ||
tlb_nohash_low.S | ||
tlb_nohash.c |