forked from luck/tmp_suning_uos_patched
9e5c602186
There are only a couple of instructions that can function as a memory barrier on parisc. Currently, we use the sync instruction as a memory barrier when releasing a spinlock. However, the ldcw instruction is a better barrier when we have a handy memory location since it operates in the cache on coherent machines. This patch updates the spinlock release code to use ldcw. I also changed the "stw,ma" instructions to "stw" instructions as it is not an adequate barrier. Signed-off-by: John David Anglin <dave.anglin@bell.net> Signed-off-by: Helge Deller <deller@gmx.de>
174 lines
4.1 KiB
C
174 lines
4.1 KiB
C
/* SPDX-License-Identifier: GPL-2.0 */
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#ifndef __ASM_SPINLOCK_H
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#define __ASM_SPINLOCK_H
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#include <asm/barrier.h>
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#include <asm/ldcw.h>
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#include <asm/processor.h>
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#include <asm/spinlock_types.h>
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static inline int arch_spin_is_locked(arch_spinlock_t *x)
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{
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volatile unsigned int *a = __ldcw_align(x);
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return *a == 0;
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}
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#define arch_spin_lock(lock) arch_spin_lock_flags(lock, 0)
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static inline void arch_spin_lock_flags(arch_spinlock_t *x,
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unsigned long flags)
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{
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volatile unsigned int *a;
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a = __ldcw_align(x);
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while (__ldcw(a) == 0)
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while (*a == 0)
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if (flags & PSW_SM_I) {
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local_irq_enable();
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cpu_relax();
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local_irq_disable();
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} else
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cpu_relax();
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}
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#define arch_spin_lock_flags arch_spin_lock_flags
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static inline void arch_spin_unlock(arch_spinlock_t *x)
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{
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volatile unsigned int *a;
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a = __ldcw_align(x);
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#ifdef CONFIG_SMP
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(void) __ldcw(a);
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#else
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mb();
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#endif
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*a = 1;
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}
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static inline int arch_spin_trylock(arch_spinlock_t *x)
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{
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volatile unsigned int *a;
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int ret;
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a = __ldcw_align(x);
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ret = __ldcw(a) != 0;
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return ret;
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}
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/*
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* Read-write spinlocks, allowing multiple readers but only one writer.
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* Linux rwlocks are unfair to writers; they can be starved for an indefinite
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* time by readers. With care, they can also be taken in interrupt context.
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*
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* In the PA-RISC implementation, we have a spinlock and a counter.
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* Readers use the lock to serialise their access to the counter (which
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* records how many readers currently hold the lock).
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* Writers hold the spinlock, preventing any readers or other writers from
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* grabbing the rwlock.
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*/
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/* Note that we have to ensure interrupts are disabled in case we're
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* interrupted by some other code that wants to grab the same read lock */
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static __inline__ void arch_read_lock(arch_rwlock_t *rw)
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{
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unsigned long flags;
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local_irq_save(flags);
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arch_spin_lock_flags(&rw->lock, flags);
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rw->counter++;
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arch_spin_unlock(&rw->lock);
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local_irq_restore(flags);
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}
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/* Note that we have to ensure interrupts are disabled in case we're
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* interrupted by some other code that wants to grab the same read lock */
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static __inline__ void arch_read_unlock(arch_rwlock_t *rw)
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{
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unsigned long flags;
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local_irq_save(flags);
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arch_spin_lock_flags(&rw->lock, flags);
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rw->counter--;
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arch_spin_unlock(&rw->lock);
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local_irq_restore(flags);
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}
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/* Note that we have to ensure interrupts are disabled in case we're
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* interrupted by some other code that wants to grab the same read lock */
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static __inline__ int arch_read_trylock(arch_rwlock_t *rw)
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{
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unsigned long flags;
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retry:
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local_irq_save(flags);
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if (arch_spin_trylock(&rw->lock)) {
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rw->counter++;
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arch_spin_unlock(&rw->lock);
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local_irq_restore(flags);
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return 1;
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}
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local_irq_restore(flags);
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/* If write-locked, we fail to acquire the lock */
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if (rw->counter < 0)
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return 0;
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/* Wait until we have a realistic chance at the lock */
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while (arch_spin_is_locked(&rw->lock) && rw->counter >= 0)
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cpu_relax();
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goto retry;
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}
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/* Note that we have to ensure interrupts are disabled in case we're
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* interrupted by some other code that wants to read_trylock() this lock */
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static __inline__ void arch_write_lock(arch_rwlock_t *rw)
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{
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unsigned long flags;
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retry:
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local_irq_save(flags);
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arch_spin_lock_flags(&rw->lock, flags);
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if (rw->counter != 0) {
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arch_spin_unlock(&rw->lock);
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local_irq_restore(flags);
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while (rw->counter != 0)
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cpu_relax();
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goto retry;
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}
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rw->counter = -1; /* mark as write-locked */
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mb();
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local_irq_restore(flags);
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}
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static __inline__ void arch_write_unlock(arch_rwlock_t *rw)
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{
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rw->counter = 0;
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arch_spin_unlock(&rw->lock);
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}
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/* Note that we have to ensure interrupts are disabled in case we're
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* interrupted by some other code that wants to read_trylock() this lock */
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static __inline__ int arch_write_trylock(arch_rwlock_t *rw)
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{
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unsigned long flags;
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int result = 0;
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local_irq_save(flags);
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if (arch_spin_trylock(&rw->lock)) {
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if (rw->counter == 0) {
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rw->counter = -1;
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result = 1;
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} else {
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/* Read-locked. Oh well. */
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arch_spin_unlock(&rw->lock);
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}
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}
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local_irq_restore(flags);
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return result;
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}
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#endif /* __ASM_SPINLOCK_H */
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