[Target] Remove unused forward declarations (NFC)

llvm/lib/Target/AArch64/AArch64.h

@@ -26,7 +26,6 @@ class AArch64Subtarget;
 class AArch64TargetMachine;
 class FunctionPass;
 class InstructionSelector;
-class MachineFunctionPass;
 
 FunctionPass *createAArch64DeadRegisterDefinitions();
 FunctionPass *createAArch64RedundantCopyEliminationPass();

llvm/lib/Target/AArch64/AArch64ISelLowering.h

@@ -487,7 +487,6 @@ const unsigned RoundingBitsPos = 22;
 } // namespace AArch64
 
 class AArch64Subtarget;
-class AArch64TargetMachine;
 
 class AArch64TargetLowering : public TargetLowering {
 public:

llvm/lib/Target/AArch64/AArch64InstrInfo.h

@@ -26,7 +26,6 @@
 namespace llvm {
 
 class AArch64Subtarget;
-class AArch64TargetMachine;
 
 static const MachineMemOperand::Flags MOSuppressPair =
     MachineMemOperand::MOTargetFlag1;

llvm/lib/Target/AArch64/AArch64MCInstLower.h

@@ -14,15 +14,12 @@
 
 namespace llvm {
 class AsmPrinter;
-class MCAsmInfo;
 class MCContext;
 class MCInst;
 class MCOperand;
 class MCSymbol;
 class MachineInstr;
-class MachineModuleInfoMachO;
 class MachineOperand;
-class Mangler;
 
 /// AArch64MCInstLower - This class is used to lower an MachineInstr
 /// into an MCInst.

llvm/lib/Target/AArch64/AArch64TargetMachine.h

@@ -20,8 +20,6 @@
 
 namespace llvm {
 
-class AArch64RegisterBankInfo;
-
 class AArch64TargetMachine : public LLVMTargetMachine {
 protected:
   std::unique_ptr<TargetLoweringObjectFile> TLOF;

llvm/lib/Target/AArch64/AArch64TargetObjectFile.h

@@ -13,7 +13,6 @@
 #include "llvm/Target/TargetLoweringObjectFile.h"
 
 namespace llvm {
-class AArch64TargetMachine;
 
 /// This implementation is used for AArch64 ELF targets (Linux in particular).
 class AArch64_ELFTargetObjectFile : public TargetLoweringObjectFileELF {

llvm/lib/Target/AArch64/GISel/AArch64CallLowering.h

@@ -24,9 +24,7 @@ namespace llvm {
 
 class AArch64TargetLowering;
 class CCValAssign;
-class DataLayout;
 class MachineIRBuilder;
-class MachineRegisterInfo;
 class Type;
 
 class AArch64CallLowering: public CallLowering {

llvm/lib/Target/AArch64/GISel/AArch64LegalizerInfo.h

@@ -21,7 +21,6 @@
 
 namespace llvm {
 
-class LLVMContext;
 class AArch64Subtarget;
 
 /// This class provides the information for the target register banks.

llvm/lib/Target/AArch64/MCTargetDesc/AArch64MCAsmInfo.h

@@ -19,7 +19,6 @@
 
 namespace llvm {
 class MCStreamer;
-class Target;
 class Triple;
 
 struct AArch64MCAsmInfoDarwin : public MCAsmInfoDarwin {

llvm/lib/Target/AArch64/MCTargetDesc/AArch64MCTargetDesc.h

@@ -30,11 +30,7 @@ class MCStreamer;
 class MCSubtargetInfo;
 class MCTargetOptions;
 class MCTargetStreamer;
-class StringRef;
 class Target;
-class Triple;
-class raw_ostream;
-class raw_pwrite_stream;
 
 MCCodeEmitter *createAArch64MCCodeEmitter(const MCInstrInfo &MCII,
                                           const MCRegisterInfo &MRI,

llvm/lib/Target/AMDGPU/AMDGPUInstrInfo.h

@@ -20,9 +20,6 @@
 namespace llvm {
 
 class GCNSubtarget;
-class MachineFunction;
-class MachineInstr;
-class MachineInstrBuilder;
 class MachineMemOperand;
 
 class AMDGPUInstrInfo {

llvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.h

@@ -30,7 +30,6 @@ namespace AMDGPU {
 struct ImageDimIntrinsicInfo;
 }
 
-class AMDGPUInstrInfo;
 class AMDGPURegisterBankInfo;
 class AMDGPUTargetMachine;
 class BlockFrequencyInfo;
@@ -42,7 +41,6 @@ class MachineOperand;
 class MachineRegisterInfo;
 class RegisterBank;
 class SIInstrInfo;
-class SIMachineFunctionInfo;
 class SIRegisterInfo;
 class TargetRegisterClass;
 

llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.h

@@ -21,7 +21,6 @@
 namespace llvm {
 
 class GCNTargetMachine;
-class LLVMContext;
 class GCNSubtarget;
 class MachineIRBuilder;
 

llvm/lib/Target/AMDGPU/AMDGPUMachineFunction.h

@@ -15,8 +15,6 @@
 
 namespace llvm {
 
-class GCNSubtarget;
-
 class AMDGPUMachineFunction : public MachineFunctionInfo {
   /// A map to keep track of local memory objects and their offsets within the
   /// local memory space.

llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.h

@@ -21,8 +21,6 @@
 
 namespace llvm {
 
-class ScheduleDAGMILive;
-
 //===----------------------------------------------------------------------===//
 // AMDGPU Target Machine (R600+)
 //===----------------------------------------------------------------------===//

llvm/lib/Target/AMDGPU/GCNHazardRecognizer.h

@@ -25,7 +25,6 @@ class MachineFunction;
 class MachineInstr;
 class MachineOperand;
 class MachineRegisterInfo;
-class ScheduleDAG;
 class SIInstrInfo;
 class SIRegisterInfo;
 class GCNSubtarget;

llvm/lib/Target/AMDGPU/R600ISelLowering.h

@@ -19,7 +19,6 @@
 
 namespace llvm {
 
-class R600InstrInfo;
 class R600Subtarget;
 
 class R600TargetLowering final : public AMDGPUTargetLowering {

llvm/lib/Target/AMDGPU/R600InstrInfo.h

@@ -29,7 +29,6 @@ enum : uint64_t {
 };
 }
 
-class AMDGPUTargetMachine;
 class DFAPacketizer;
 class MachineFunction;
 class MachineInstr;

llvm/lib/Target/AMDGPU/R600Subtarget.h

@@ -21,12 +21,6 @@
 #include "Utils/AMDGPUBaseInfo.h"
 #include "llvm/CodeGen/SelectionDAGTargetInfo.h"
 
-namespace llvm {
-
-class MCInstrInfo;
-
-} // namespace llvm
-
 #define GET_SUBTARGETINFO_HEADER
 #include "R600GenSubtargetInfo.inc"
 

llvm/lib/Target/AMDGPU/SIFrameLowering.h

@@ -13,11 +13,6 @@
 
 namespace llvm {
 
-class SIInstrInfo;
-class SIMachineFunctionInfo;
-class SIRegisterInfo;
-class GCNSubtarget;
-
 class SIFrameLowering final : public AMDGPUFrameLowering {
 public:
   SIFrameLowering(StackDirection D, Align StackAl, int LAO,

llvm/lib/Target/ARM/ARM.h

@@ -29,8 +29,6 @@ struct BasicBlockInfo;
 class Function;
 class FunctionPass;
 class InstructionSelector;
-class MachineBasicBlock;
-class MachineFunction;
 class MachineInstr;
 class MCInst;
 class PassRegistry;

llvm/lib/Target/ARM/ARMCallLowering.h

@@ -23,7 +23,6 @@
 namespace llvm {
 
 class ARMTargetLowering;
-class MachineFunction;
 class MachineInstrBuilder;
 class MachineIRBuilder;
 class Value;

llvm/lib/Target/ARM/ARMRegisterInfo.h

@@ -17,8 +17,6 @@
 
 namespace llvm {
 
-class ARMSubtarget;
-
 struct ARMRegisterInfo : public ARMBaseRegisterInfo {
   virtual void anchor();
 public:

llvm/lib/Target/ARM/MCTargetDesc/ARMMCTargetDesc.h

@@ -36,8 +36,6 @@ class MCTargetStreamer;
 class StringRef;
 class Target;
 class Triple;
-class raw_ostream;
-class raw_pwrite_stream;
 
 namespace ARM_MC {
 std::string ParseARMTriple(const Triple &TT, StringRef CPU);

llvm/lib/Target/ARM/Thumb2InstrInfo.h

@@ -18,7 +18,6 @@
 
 namespace llvm {
 class ARMSubtarget;
-class ScheduleHazardRecognizer;
 
 class Thumb2InstrInfo : public ARMBaseInstrInfo {
   ThumbRegisterInfo RI;

llvm/lib/Target/Mips/MipsCallLowering.h

@@ -18,7 +18,6 @@
 
 namespace llvm {
 
-class MachineMemOperand;
 class MipsTargetLowering;
 
 class MipsCallLowering : public CallLowering {

llvm/lib/Target/RISCV/MCTargetDesc/RISCVMatInt.h

@@ -15,7 +15,6 @@
 
 namespace llvm {
 class APInt;
-class MCSubtargetInfo;
 
 namespace RISCVMatInt {
 struct Inst {

llvm/lib/Target/SystemZ/MCTargetDesc/SystemZMCTargetDesc.h

@@ -23,11 +23,7 @@ class MCObjectTargetWriter;
 class MCRegisterInfo;
 class MCSubtargetInfo;
 class MCTargetOptions;
-class StringRef;
 class Target;
-class Triple;
-class raw_pwrite_stream;
-class raw_ostream;
 
 namespace SystemZMC {
 // How many bytes are in the ABI-defined, caller-allocated part of

llvm/lib/Target/SystemZ/SystemZAsmPrinter.h

@@ -19,7 +19,6 @@
 
 namespace llvm {
 class MCStreamer;
-class MachineBasicBlock;
 class MachineInstr;
 class Module;
 class raw_ostream;

llvm/lib/Target/SystemZ/SystemZFrameLowering.h

@@ -17,7 +17,6 @@
 #include "llvm/Support/TypeSize.h"
 
 namespace llvm {
-class SystemZTargetMachine;
 class SystemZSubtarget;
 
 class SystemZFrameLowering : public TargetFrameLowering {

llvm/lib/Target/SystemZ/SystemZISelLowering.h

@@ -381,7 +381,6 @@ enum {
 } // end namespace SystemZICMP
 
 class SystemZSubtarget;
-class SystemZTargetMachine;
 
 class SystemZTargetLowering : public TargetLowering {
 public:

llvm/lib/Target/SystemZ/SystemZMCInstLower.h

@@ -18,7 +18,6 @@ class MCInst;
 class MCOperand;
 class MachineInstr;
 class MachineOperand;
-class Mangler;
 class SystemZAsmPrinter;
 
 class LLVM_LIBRARY_VISIBILITY SystemZMCInstLower {

llvm/lib/Target/SystemZ/SystemZSelectionDAGInfo.h

@@ -17,8 +17,6 @@
 
 namespace llvm {
 
-class SystemZTargetMachine;
-
 class SystemZSelectionDAGInfo : public SelectionDAGTargetInfo {
 public:
   explicit SystemZSelectionDAGInfo() = default;

llvm/lib/Target/VE/MCTargetDesc/VEMCTargetDesc.h

@@ -27,10 +27,6 @@ class MCRegisterInfo;
 class MCSubtargetInfo;
 class MCTargetOptions;
 class Target;
-class Triple;
-class StringRef;
-class raw_pwrite_stream;
-class raw_ostream;
 
 MCCodeEmitter *createVEMCCodeEmitter(const MCInstrInfo &MCII,
                                      const MCRegisterInfo &MRI, MCContext &Ctx);

llvm/lib/Target/VE/VE.h

@@ -22,7 +22,6 @@
 namespace llvm {
 class FunctionPass;
 class VETargetMachine;
-class formatted_raw_ostream;
 class AsmPrinter;
 class MCInst;
 class MachineInstr;

llvm/lib/Target/WebAssembly/MCTargetDesc/WebAssemblyMCTargetDesc.h

@@ -26,7 +26,6 @@ class MCAsmBackend;
 class MCCodeEmitter;
 class MCInstrInfo;
 class MCObjectTargetWriter;
-class MVT;
 class Triple;
 
 MCCodeEmitter *createWebAssemblyMCCodeEmitter(const MCInstrInfo &MCII);

llvm/lib/Target/WebAssembly/Utils/WebAssemblyUtilities.h

@@ -25,7 +25,6 @@ class MachineInstr;
 class MachineOperand;
 class MCContext;
 class MCSymbolWasm;
-class StringRef;
 class WebAssemblyFunctionInfo;
 class WebAssemblySubtarget;
 

llvm/lib/Target/X86/X86CallLowering.h

@@ -20,8 +20,6 @@
 namespace llvm {
 
 template <typename T> class ArrayRef;
-class DataLayout;
-class MachineRegisterInfo;
 class X86TargetLowering;
 
 class X86CallLowering : public CallLowering {