[M68k] Add MC support for link/unlk
Reviewers: myhsu Differential Revision: https://reviews.llvm.org/D125444
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Sheng
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@ -546,9 +546,9 @@ void M68kFrameLowering::emitPrologue(MachineFunction &MF,
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// Update the frame offset adjustment.
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MFI.setOffsetAdjustment(-NumBytes);
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// Save FP into the appropriate stack slot.
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BuildMI(MBB, MBBI, DL, TII.get(M68k::PUSH32r))
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.addReg(MachineFramePtr, RegState::Kill)
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BuildMI(MBB, MBBI, DL, TII.get(M68k::LINK16))
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.addReg(M68k::WA6, RegState::Kill)
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.addImm(-NumBytes)
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.setMIFlag(MachineInstr::FrameSetup);
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if (NeedsDwarfCFI) {
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@ -566,11 +566,6 @@ void M68kFrameLowering::emitPrologue(MachineFunction &MF,
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2 * stackGrowth));
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}
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// Update FP with the new base value.
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BuildMI(MBB, MBBI, DL, TII.get(M68k::MOV32aa), FramePtr)
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.addReg(StackPtr)
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.setMIFlag(MachineInstr::FrameSetup);
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if (NeedsDwarfCFI) {
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// Mark effective beginning of when frame pointer becomes valid.
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// Define the current CFA to use the FP register.
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@ -619,7 +614,8 @@ void M68kFrameLowering::emitPrologue(MachineFunction &MF,
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NumBytes -= mergeSPUpdates(MBB, MBBI, true);
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// Adjust stack pointer: ESP -= numbytes.
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emitSPUpdate(MBB, MBBI, -(int64_t)NumBytes, /*InEpilogue=*/false);
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if (!HasFP)
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emitSPUpdate(MBB, MBBI, -(int64_t)NumBytes, /*InEpilogue=*/false);
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unsigned SPOrEstablisher = StackPtr;
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@ -702,9 +698,6 @@ void M68kFrameLowering::emitEpilogue(MachineFunction &MF,
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if (TRI->hasStackRealignment(MF))
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NumBytes = alignTo(FrameSize, MaxAlign);
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// Pop FP.
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BuildMI(MBB, MBBI, DL, TII.get(M68k::POP32r), MachineFramePtr)
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.setMIFlag(MachineInstr::FrameDestroy);
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} else {
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NumBytes = StackSize - CSSize;
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}
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@ -749,10 +742,15 @@ void M68kFrameLowering::emitEpilogue(MachineFunction &MF,
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LEAAmount);
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--MBBI;
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} else {
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unsigned Opc = (M68k::MOV32rr);
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BuildMI(MBB, MBBI, DL, TII.get(Opc), StackPtr).addReg(FramePtr);
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BuildMI(MBB, MBBI, DL, TII.get(M68k::UNLK))
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.addReg(MachineFramePtr, RegState::Kill)
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.setMIFlag(MachineInstr::FrameDestroy);
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--MBBI;
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}
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} else if (hasFP(MF)) {
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BuildMI(MBB, MBBI, DL, TII.get(M68k::UNLK))
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.addReg(MachineFramePtr, RegState::Kill)
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.setMIFlag(MachineInstr::FrameDestroy);
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} else if (NumBytes) {
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// Adjust stack pointer back: SP += numbytes.
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emitSPUpdate(MBB, MBBI, NumBytes, /*InEpilogue=*/true);
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@ -437,6 +437,35 @@ foreach AM = ["p", "f", "b", "q", "k"] in
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def LEA32 # AM : MxLEA<!cast<MxOpBundle>("MxOp32AddrMode_"#AM),
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!cast<MxEncMemOp>("MxMoveSrcOpEnc_"#AM)>;
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//===----------------------------------------------------------------------===//
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// LINK/UNLK
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//===----------------------------------------------------------------------===//
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let Uses = [SP], Defs = [SP] in {
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let mayStore = 1 in {
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def LINK16 : MxInst<(outs), (ins MxARD16:$src, Mxi16imm:$disp), "link.w\t$src, $disp", []> {
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let Inst = (ascend
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(descend 0b0100111001010, (operand "$src", 3)),
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(operand "$disp", 16)
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);
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}
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def LINK32 : MxInst<(outs), (ins MxARD16:$src, Mxi32imm:$disp), "link.l\t$src, $disp", []> {
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let Inst = (ascend
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(descend 0b0100100000001, (operand "$src", 3)),
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(slice "$disp", 31, 16),
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(slice "$disp", 15, 0)
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);
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}
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def UNLK : MxInst<(outs), (ins MxARD32:$src), "unlk\t$src", []> {
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let Inst = (descend 0b0100111001011, (operand "$src", 3));
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}
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} // let mayStore = 1
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} // let Uses = [SP], Defs = [SP]
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//===----------------------------------------------------------------------===//
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// Pseudos
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//===----------------------------------------------------------------------===//
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@ -4,15 +4,13 @@ define i32 @A(i32 %Size) {
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; CHECK-LABEL: A:
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; CHECK: .cfi_startproc
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; CHECK-NEXT: ; %bb.0:
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; CHECK-NEXT: move.l %a6, -(%sp)
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; CHECK-NEXT: link.w %a6, #-128
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; CHECK-NEXT: .cfi_def_cfa_offset -8
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; CHECK-NEXT: .cfi_offset %a6, -8
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; CHECK-NEXT: move.l %sp, %a6
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; CHECK-NEXT: .cfi_def_cfa_register %a6
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; CHECK-NEXT: move.l %sp, %d0
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; CHECK-NEXT: and.l #-128, %d0
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; CHECK-NEXT: move.l %d0, %sp
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; CHECK-NEXT: suba.l #128, %sp
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; CHECK-NEXT: move.l %sp, %a4
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; CHECK-NEXT: movem.l %a4, (116,%a4) ; 8-byte Folded Spill
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; CHECK-NEXT: move.l (8,%a6), %d1
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@ -23,8 +21,7 @@ define i32 @A(i32 %Size) {
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; CHECK-NEXT: and.l #-128, %d0
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; CHECK-NEXT: move.l %d0, %sp
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; CHECK-NEXT: movem.l (116,%a4), %a4 ; 8-byte Folded Reload
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; CHECK-NEXT: move.l %a6, %sp
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; CHECK-NEXT: move.l (%sp)+, %a6
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; CHECK-NEXT: unlk %a6
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; CHECK-NEXT: rts
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%A = alloca i8, i32 %Size, align 128
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%A_addr = ptrtoint i8* %A to i32
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96
llvm/test/CodeGen/M68k/link-unlnk.ll
Normal file
96
llvm/test/CodeGen/M68k/link-unlnk.ll
Normal file
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@ -0,0 +1,96 @@
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; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc -frame-pointer=all -mtriple=m68k-linux-gnu %s -verify-machineinstrs -o - \
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; RUN: | FileCheck --check-prefix=FP %s
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; RUN: llc -frame-pointer=none -mtriple=m68k-linux-gnu %s -verify-machineinstrs -o - \
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; RUN: | FileCheck --check-prefix=NO-FP %s
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define i32 @fib(i32 %a, i32 %b) {
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; FP-LABEL: fib:
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; FP: .cfi_startproc
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; FP-NEXT: ; %bb.0: ; %entry
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; FP-NEXT: link.w %a6, #-32
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; FP-NEXT: .cfi_def_cfa_offset -8
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; FP-NEXT: .cfi_offset %a6, -8
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; FP-NEXT: .cfi_def_cfa_register %a6
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; FP-NEXT: move.l (8,%a6), %d1
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; FP-NEXT: move.l %d1, (-32,%a6)
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; FP-NEXT: move.l (12,%a6), %d0
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; FP-NEXT: add.l %d0, %d1
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; FP-NEXT: move.l %d0, (0,%a6)
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; FP-NEXT: add.l %d1, %d0
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; FP-NEXT: move.l %d1, (32,%a6)
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; FP-NEXT: add.l %d0, %d1
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; FP-NEXT: move.l %d0, (64,%a6)
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; FP-NEXT: move.l %d1, (96,%a6)
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; FP-NEXT: add.l %d1, %d0
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; FP-NEXT: move.l %d0, (128,%a6)
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; FP-NEXT: add.l %d0, %d1
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; FP-NEXT: move.l %d1, (160,%a6)
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; FP-NEXT: add.l %d1, %d0
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; FP-NEXT: move.l %d0, (192,%a6)
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; FP-NEXT: unlk %a6
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; FP-NEXT: rts
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;
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; NO-FP-LABEL: fib:
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; NO-FP: .cfi_startproc
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; NO-FP-NEXT: ; %bb.0: ; %entry
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; NO-FP-NEXT: suba.l #32, %sp
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; NO-FP-NEXT: .cfi_def_cfa_offset -36
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; NO-FP-NEXT: move.l (36,%sp), %d1
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; NO-FP-NEXT: move.l %d1, (0,%sp)
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; NO-FP-NEXT: move.l (40,%sp), %d0
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; NO-FP-NEXT: add.l %d0, %d1
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; NO-FP-NEXT: move.l %d0, (32,%sp)
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; NO-FP-NEXT: add.l %d1, %d0
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; NO-FP-NEXT: move.l %d1, (64,%sp)
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; NO-FP-NEXT: add.l %d0, %d1
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; NO-FP-NEXT: move.l %d0, (96,%sp)
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; NO-FP-NEXT: move.l %d1, (128,%sp)
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; NO-FP-NEXT: add.l %d1, %d0
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; NO-FP-NEXT: move.l %d0, (160,%sp)
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; NO-FP-NEXT: add.l %d0, %d1
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; NO-FP-NEXT: move.l %d1, (192,%sp)
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; NO-FP-NEXT: add.l %d1, %d0
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; NO-FP-NEXT: move.l %d0, (224,%sp)
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; NO-FP-NEXT: adda.l #32, %sp
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; NO-FP-NEXT: rts
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entry:
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%arr = alloca [8 x i32], align 4
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%s0 = getelementptr [8 x i32], ptr %arr, i32 0
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%s1 = getelementptr [8 x i32], ptr %arr, i32 1
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store i32 %a, i32* %s0
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store i32 %b, i32* %s1
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%ptr0 = getelementptr [8 x i32], ptr %arr, i32 0
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%ptr1 = getelementptr [8 x i32], ptr %arr, i32 1
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%ptr2 = getelementptr [8 x i32], ptr %arr, i32 2
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%ptr3 = getelementptr [8 x i32], ptr %arr, i32 3
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%ptr4 = getelementptr [8 x i32], ptr %arr, i32 4
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%ptr5 = getelementptr [8 x i32], ptr %arr, i32 5
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%ptr6 = getelementptr [8 x i32], ptr %arr, i32 6
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%ptr7 = getelementptr [8 x i32], ptr %arr, i32 7
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%res0 = load i32, i32 * %ptr0
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%res1 = load i32, i32 * %ptr1
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%res2 = add i32 %res0, %res1
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store i32 %res2, i32 * %ptr2
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%res3 = add i32 %res1, %res2
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store i32 %res3, i32 * %ptr3
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%res4 = add i32 %res2, %res3
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store i32 %res4, i32 * %ptr4
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%res5 = add i32 %res3, %res4
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store i32 %res5, i32 * %ptr5
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%res6 = add i32 %res4, %res5
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store i32 %res6, i32 * %ptr6
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%res7 = add i32 %res5, %res6
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store i32 %res7, i32 * %ptr7
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ret i32 %res7
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}
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@ -2,6 +2,7 @@
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# CHECK: move.l %a1, %a0
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0x20 0x49
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# CHECK: lea (50,%a0), %a1
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0x43 0xe8 0x00 0x32
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@ -52,3 +53,11 @@
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# CHECK: move.l (129,%pc,%d2), %d3
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0x26 0x3b 0x28 0x81
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# CHECK: link.w %a3, #31
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0x4e 0x53 0x00 0x1f
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# CHECK: link.l %a6, #65537
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0x48 0x0e 0x00 0x01 0x00 0x01
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# CHECK: unlk %a0
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0x4e 0x58
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13
llvm/test/MC/M68k/Data/Classes/MxLink.s
Normal file
13
llvm/test/MC/M68k/Data/Classes/MxLink.s
Normal file
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@ -0,0 +1,13 @@
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; RUN: llvm-mc --show-encoding -triple=m68k %s | FileCheck %s
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# CHECK: link.w %a2, #1023
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# CHECK-SAME: encoding: [0x4e,0x52,0x03,0xff]
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link.w %a2, #1023
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# CHECK: link.l %a1, #1073741823
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# CHECK-SAME: encoding: [0x48,0x09,0x3f,0xff,0xff,0xff]
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link.l %a1, #1073741823
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# CHECK: unlk %a5
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# CHECK-SAME: encoding: [0x4e,0x5d]
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unlk %a5
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