llvm-tblgen: Cleanup for each EmitterClass to be invoked by uniform signature.
Differential Revision: https://reviews.llvm.org/D144351
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@ -3205,6 +3205,8 @@ void AsmMatcherEmitter::run(raw_ostream &OS) {
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Record *AsmParser = Target.getAsmParser();
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StringRef ClassName = AsmParser->getValueAsString("AsmParserClassName");
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emitSourceFileHeader("Assembly Matcher Source Fragment", OS);
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// Compute the information on the instructions to match.
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AsmMatcherInfo Info(AsmParser, Target, Records);
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Info.buildInfo();
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@ -4005,7 +4007,6 @@ void AsmMatcherEmitter::run(raw_ostream &OS) {
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namespace llvm {
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void EmitAsmMatcher(RecordKeeper &RK, raw_ostream &OS) {
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emitSourceFileHeader("Assembly Matcher Source Fragment", OS);
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AsmMatcherEmitter(RK).run(OS);
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}
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@ -1303,6 +1303,7 @@ void AsmWriterEmitter::run(raw_ostream &O) {
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std::vector<std::vector<std::string>> TableDrivenOperandPrinters;
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unsigned BitsLeft = 0;
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unsigned AsmStrBits = 0;
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emitSourceFileHeader("Assembly Writer Source Fragment", O);
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EmitGetMnemonic(O, TableDrivenOperandPrinters, BitsLeft, AsmStrBits);
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EmitPrintInstruction(O, TableDrivenOperandPrinters, BitsLeft, AsmStrBits);
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EmitGetRegisterName(O);
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@ -1312,7 +1313,6 @@ void AsmWriterEmitter::run(raw_ostream &O) {
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namespace llvm {
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void EmitAsmWriter(RecordKeeper &RK, raw_ostream &OS) {
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emitSourceFileHeader("Assembly Writer Source Fragment", OS);
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AsmWriterEmitter(RK).run(OS);
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}
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@ -18,7 +18,7 @@ namespace {
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class Attributes {
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public:
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Attributes(RecordKeeper &R) : Records(R) {}
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void emit(raw_ostream &OS);
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void run(raw_ostream &OS);
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private:
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void emitTargetIndependentNames(raw_ostream &OS);
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@ -124,7 +124,7 @@ void Attributes::emitAttributeProperties(raw_ostream &OS) {
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OS << "#endif\n";
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}
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void Attributes::emit(raw_ostream &OS) {
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void Attributes::run(raw_ostream &OS) {
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emitTargetIndependentNames(OS);
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emitFnAttrCompatCheck(OS, false);
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emitAttributeProperties(OS);
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@ -133,7 +133,7 @@ void Attributes::emit(raw_ostream &OS) {
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namespace llvm {
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void EmitAttributes(RecordKeeper &RK, raw_ostream &OS) {
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Attributes(RK).emit(OS);
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Attributes(RK).run(OS);
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}
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} // namespace llvm
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@ -42,6 +42,8 @@ private:
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} // End anonymous namespace
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void CallingConvEmitter::run(raw_ostream &O) {
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emitSourceFileHeader("Calling Convention Implementation Fragment", O);
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std::vector<Record *> CCs = Records.getAllDerivedDefinitions("CallingConv");
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// Emit prototypes for all of the non-custom CC's so that they can forward ref
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@ -430,7 +432,6 @@ void CallingConvEmitter::EmitArgRegisterLists(raw_ostream &O) {
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namespace llvm {
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void EmitCallingConv(RecordKeeper &RK, raw_ostream &OS) {
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emitSourceFileHeader("Calling Convention Implementation Fragment", OS);
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CallingConvEmitter(RK).run(OS);
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}
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@ -358,6 +358,8 @@ void CodeEmitterGen::emitInstructionBaseValues(
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}
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void CodeEmitterGen::run(raw_ostream &o) {
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emitSourceFileHeader("Machine Code Emitter", o);
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CodeGenTarget Target(Records);
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std::vector<Record*> Insts = Records.getAllDerivedDefinitions("Instruction");
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@ -505,7 +507,6 @@ void CodeEmitterGen::run(raw_ostream &o) {
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namespace llvm {
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void EmitCodeEmitter(RecordKeeper &RK, raw_ostream &OS) {
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emitSourceFileHeader("Machine Code Emitter", OS);
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CodeEmitterGen(RK).run(OS);
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}
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@ -125,6 +125,7 @@ struct PatternSortingPredicate {
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void DAGISelEmitter::run(raw_ostream &OS) {
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Records.startTimer("Parse patterns");
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emitSourceFileHeader("DAG Instruction Selector for the " +
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CGP.getTargetInfo().getName().str() + " target", OS);
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@ -190,7 +191,6 @@ void DAGISelEmitter::run(raw_ostream &OS) {
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namespace llvm {
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void EmitDAGISel(RecordKeeper &RK, raw_ostream &OS) {
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RK.startTimer("Parse patterns");
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DAGISelEmitter(RK).run(OS);
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}
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@ -206,6 +206,7 @@ void DFAPacketizerEmitter::createScheduleClasses(unsigned ItineraryIdx,
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// Run the worklist algorithm to generate the DFA.
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//
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void DFAPacketizerEmitter::run(raw_ostream &OS) {
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emitSourceFileHeader("Target DFA Packetizer Tables", OS);
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OS << "\n"
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<< "#include \"llvm/CodeGen/DFAPacketizer.h\"\n";
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OS << "namespace llvm {\n";
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@ -356,7 +357,6 @@ void DFAPacketizerEmitter::emitForItineraries(
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namespace llvm {
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void EmitDFAPacketizer(RecordKeeper &RK, raw_ostream &OS) {
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emitSourceFileHeader("Target DFA Packetizer Tables", OS);
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DFAPacketizerEmitter(RK).run(OS);
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}
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@ -70,7 +70,7 @@ class SubtargetEmitter {
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}
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};
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const CodeGenTarget &TGT;
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CodeGenTarget TGT;
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RecordKeeper &Records;
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CodeGenSchedModels &SchedModels;
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std::string Target;
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@ -128,8 +128,8 @@ class SubtargetEmitter {
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void ParseFeaturesFunction(raw_ostream &OS);
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public:
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SubtargetEmitter(RecordKeeper &R, CodeGenTarget &TGT)
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: TGT(TGT), Records(R), SchedModels(TGT.getSchedModels()),
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SubtargetEmitter(RecordKeeper &R)
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: TGT(R), Records(R), SchedModels(TGT.getSchedModels()),
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Target(TGT.getName()) {}
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void run(raw_ostream &o);
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@ -1988,8 +1988,7 @@ void SubtargetEmitter::run(raw_ostream &OS) {
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namespace llvm {
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void EmitSubtarget(RecordKeeper &RK, raw_ostream &OS) {
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CodeGenTarget CGTarget(RK);
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SubtargetEmitter(RK, CGTarget).run(OS);
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SubtargetEmitter(RK).run(OS);
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}
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} // end namespace llvm
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@ -141,7 +141,7 @@ public:
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X86FoldTablesEmitter(RecordKeeper &R) : Records(R), Target(R) {}
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// run - Generate the 6 X86 memory fold tables.
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void run(formatted_raw_ostream &OS);
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void run(raw_ostream &OS);
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private:
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// Decides to which table to add the entry with the given instructions.
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@ -522,7 +522,8 @@ void X86FoldTablesEmitter::updateTables(const CodeGenInstruction *RegInstr,
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}
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}
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void X86FoldTablesEmitter::run(formatted_raw_ostream &OS) {
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void X86FoldTablesEmitter::run(raw_ostream &o) {
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formatted_raw_ostream OS(o);
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emitSourceFileHeader("X86 fold tables", OS);
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// Holds all memory instructions
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@ -615,8 +616,7 @@ void X86FoldTablesEmitter::run(formatted_raw_ostream &OS) {
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namespace llvm {
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void EmitX86FoldTables(RecordKeeper &RK, raw_ostream &o) {
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formatted_raw_ostream OS(o);
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void EmitX86FoldTables(RecordKeeper &RK, raw_ostream &OS) {
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X86FoldTablesEmitter(RK).run(OS);
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}
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} // namespace llvm
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