bb0548a6ed
When compiling compiler-rt with -fsanitize=undefined and running testcases you end up with the following warning: UBSan: floatdisf.c:27:15: signed integer overflow: 9223372036854775807 - -1 cannot be represented in type 'di_int' (aka 'long long') This can be avoided by doing the subtraction in a matching unsigned variant of the type, given that the overflow is the expected result of the subtraction. The same kind of pattern exists in floatdidf.c This was found in an out of tree target. Reviewed By: phosek Differential Revision: https://reviews.llvm.org/D146135
80 lines
2.6 KiB
C
80 lines
2.6 KiB
C
//===-- floatdisf.c - Implement __floatdisf -------------------------------===//
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//
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// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
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// See https://llvm.org/LICENSE.txt for license information.
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// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
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//
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//===----------------------------------------------------------------------===//
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//
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// This file implements __floatdisf for the compiler_rt library.
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//
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//===----------------------------------------------------------------------===//
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// Returns: convert a to a float, rounding toward even.
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// Assumption: float is a IEEE 32 bit floating point type
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// di_int is a 64 bit integral type
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// seee eeee emmm mmmm mmmm mmmm mmmm mmmm
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#include "int_lib.h"
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COMPILER_RT_ABI float __floatdisf(di_int a) {
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if (a == 0)
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return 0.0F;
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const unsigned N = sizeof(di_int) * CHAR_BIT;
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const di_int s = a >> (N - 1);
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a = (du_int)(a ^ s) - s;
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int sd = N - __builtin_clzll(a); // number of significant digits
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si_int e = sd - 1; // exponent
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if (sd > FLT_MANT_DIG) {
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// start: 0000000000000000000001xxxxxxxxxxxxxxxxxxxxxxPQxxxxxxxxxxxxxxxxxx
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// finish: 000000000000000000000000000000000000001xxxxxxxxxxxxxxxxxxxxxxPQR
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// 12345678901234567890123456
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// 1 = msb 1 bit
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// P = bit FLT_MANT_DIG-1 bits to the right of 1
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// Q = bit FLT_MANT_DIG bits to the right of 1
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// R = "or" of all bits to the right of Q
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switch (sd) {
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case FLT_MANT_DIG + 1:
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a <<= 1;
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break;
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case FLT_MANT_DIG + 2:
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break;
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default:
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a = ((du_int)a >> (sd - (FLT_MANT_DIG + 2))) |
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((a & ((du_int)(-1) >> ((N + FLT_MANT_DIG + 2) - sd))) != 0);
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};
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// finish:
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a |= (a & 4) != 0; // Or P into R
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++a; // round - this step may add a significant bit
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a >>= 2; // dump Q and R
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// a is now rounded to FLT_MANT_DIG or FLT_MANT_DIG+1 bits
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if (a & ((du_int)1 << FLT_MANT_DIG)) {
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a >>= 1;
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++e;
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}
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// a is now rounded to FLT_MANT_DIG bits
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} else {
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a <<= (FLT_MANT_DIG - sd);
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// a is now rounded to FLT_MANT_DIG bits
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}
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float_bits fb;
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fb.u = ((su_int)s & 0x80000000) | // sign
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((e + 127) << 23) | // exponent
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((su_int)a & 0x007FFFFF); // mantissa
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return fb.f;
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}
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#if defined(__ARM_EABI__)
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#if defined(COMPILER_RT_ARMHF_TARGET)
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AEABI_RTABI float __aeabi_l2f(di_int a) { return __floatdisf(a); }
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#else
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COMPILER_RT_ALIAS(__floatdisf, __aeabi_l2f)
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#endif
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#endif
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#if defined(__MINGW32__) && defined(__arm__)
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COMPILER_RT_ALIAS(__floatdisf, __i64tos)
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#endif
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