llvm-project/llvm/test/DebugInfo/AArch64
Andrew Savonichev c65b4d64d4 [SelectionDAG] Do not second-guess alignment for alloca
Alignment of an alloca in IR can be lower than the preferred alignment
on purpose, but this override essentially treats the preferred
alignment as the minimum alignment.

The patch changes this behavior to always use the specified
alignment. If alignment is not set explicitly in LLVM IR, it is set to
DL.getPrefTypeAlign(Ty) in computeAllocaDefaultAlign.

Tests are changed as well: explicit alignment is increased to match
the preferred alignment if it changes output, or omitted when it is
hard to determine the right value (e.g. for pointers, some structs, or
weird types).

Differential Revision: https://reviews.llvm.org/D135462
2023-02-09 18:45:20 +03:00
..
asan-stack-vars.mir
big-endian-dump.ll
big-endian.ll
bitfields.ll Revert "Revert "[DebugInfo] Correctly recognize bitfields when emitting dwarf"" 2022-12-22 03:31:36 -05:00
call-site-info-output.ll
cfi-eof-prologue.ll
coalescing.ll
compiler-gen-bbs-livedebugvalues.mir
constant-dbgloc.ll
dagcombine-zext.ll
dbg-sve-types.ll
dbg-value-i8.ll
dbg-value-i16.ll
dbgcall-site-float-entry-value.ll
debug-reg-bank.ll
debugline-endsequence.ll
dwarfdump.ll
eh_frame_personality.ll [AArch64] Unconditionally use DW_EH_PE_indirect|DW_EH_PE_pcrel personality/lsda/ttype encodings 2023-02-05 10:46:43 -08:00
eh_frame.s
eh-frame.ll
fallthrough-branch.ll
frame-loclistx.s
frameindices.ll [SelectionDAG] Do not second-guess alignment for alloca 2023-02-09 18:45:20 +03:00
inlined-argument.ll
instr-ref-const-physreg.ll [DebugInfo][NFC] Add new MachineOperand type and change DBG_INSTR_REF syntax 2023-01-06 18:03:48 +00:00
ir-outliner.ll
line-header.ll
lit.local.cfg
little-endian-dump.ll
machine-outliner.ll
pr40709.ll
processes-relocations.ll
prologue_end.ll
return-address-signing.ll
stack-tagging-cfi.s
struct_by_value.ll
tls-at-location.ll