35f7020098
All tests use ISL, integrate its subfolder into the components they belong to.
60 lines
2.1 KiB
Plaintext
60 lines
2.1 KiB
Plaintext
{
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"arrays" : [
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{
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"name" : "MemRef_tmp4",
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"sizes" : [ "*" ],
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"type" : "i32"
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},
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{
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"name" : "MemRef__pn",
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"sizes" : [ "*" ],
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"type" : "i32"
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}
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],
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"context" : "[tmp5] -> { : -2147483648 <= tmp5 <= 2147483647 }",
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"name" : "%for.body344---%if.then.i.i1141.loopexit",
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"statements" : [
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{
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"accesses" : [
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{
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"kind" : "write",
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"relation" : "[tmp5] -> { Stmt_for_body344[i0] -> MemRef_cond_in_sroa_speculated__phi[] }"
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}
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],
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"domain" : "[tmp5] -> { Stmt_for_body344[i0] : 0 <= i0 < tmp5; Stmt_for_body344[0] : tmp5 <= 0 }",
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"name" : "Stmt_for_body344",
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"schedule" : "[tmp5] -> { Stmt_for_body344[i0] -> [i0, 0] : i0 < tmp5; Stmt_for_body344[0] -> [0, 0] : tmp5 <= 0 }"
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},
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{
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"accesses" : [
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{
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"kind" : "read",
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"relation" : "[tmp5] -> { Stmt_cond_false[i0] -> MemRef_tmp4[1 + i0] }"
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},
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{
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"kind" : "write",
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"relation" : "[tmp5] -> { Stmt_cond_false[i0] -> MemRef_cond_in_sroa_speculated__phi[] }"
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}
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],
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"domain" : "[tmp5] -> { Stmt_cond_false[i0] : 0 <= i0 <= -2 + tmp5; Stmt_cond_false[0] : tmp5 <= 0 }",
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"name" : "Stmt_cond_false",
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"schedule" : "[tmp5] -> { Stmt_cond_false[i0] -> [i0, 1] : i0 <= -2 + tmp5; Stmt_cond_false[0] -> [0, 1] : tmp5 <= 0 }"
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},
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{
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"accesses" : [
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{
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"kind" : "read",
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"relation" : "[tmp5] -> { Stmt_cond_end[i0] -> MemRef_cond_in_sroa_speculated__phi[] }"
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},
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{
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"kind" : "write",
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"relation" : "[tmp5] -> { Stmt_cond_end[i0] -> MemRef__pn[i0] }"
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}
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],
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"domain" : "[tmp5] -> { Stmt_cond_end[i0] : 0 <= i0 < tmp5; Stmt_cond_end[0] : tmp5 <= 0 }",
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"name" : "Stmt_cond_end",
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"schedule" : "[tmp5] -> { Stmt_cond_end[i0] -> [i0, 2] : i0 < tmp5; Stmt_cond_end[0] -> [0, 2] : tmp5 <= 0 }"
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}
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]
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}
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