llvm-project/mlir/test/Conversion/VectorToLLVM
Brandon Myers 85fe8e01a0 [mlir] Add mlir::LLVM::FastmathFlags to LLVM instrinsic vector reductions
Rationale:
The LLVM dialect supports passing fastmath flags from floating point ops to LLVMIR instructions. However, not all LLVM ops have the required attribute. This change adds support for fastmath flags to `llvm.intr.vector.reduce.{fmin,fmax}`. One scenario where this is useful is in lowering llvm.intr.vector.reduce.{fmax,fmin} to LLVMIR with `nnan` (NoNans) flag so it may be [[ 115c7beda7/llvm/lib/CodeGen/ExpandReductions.cpp (L159) | lowered to a shuffle reduction ]].

Changes:

  - Make `LLVM_VecReductionF` implement the `FastmathFlagsInterface`; change is modeled on `LLVM_UnaryIntrOpF`
  - Add an assembly format for `LLVM_VecReductionF` ops. The purpose is to keep existing functionality: avoid printing the fastmath flags attribute when it has its default value (`none`). Change is modeled on `LLVM_UnaryIntrOpBase`

Reviewed By: gysit

Differential Revision: https://reviews.llvm.org/D145692
2023-03-10 09:14:16 -08:00
..
typed-pointers.mlir
vector-mask-to-llvm.mlir
vector-reduction-to-llvm.mlir
vector-scalable-memcpy.mlir
vector-to-llvm.mlir