3b090ff2bd
In issue #60632, we have vector math ops that differ because an operand is shuffled, but the math has limited demanded elements, so it can be replaced by another instruction: https://alive2.llvm.org/ce/z/TKqq7H I don't think we have anything like this yet - it's like a CSE/GVN fold, but driven by demanded elements of a vector op. This is limited to splat-0 as a first step to keep it simple. Differential Revision: https://reviews.llvm.org/D144760
1779 lines
70 KiB
C++
1779 lines
70 KiB
C++
//===- InstCombineSimplifyDemanded.cpp ------------------------------------===//
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//
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// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
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// See https://llvm.org/LICENSE.txt for license information.
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// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
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//
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//===----------------------------------------------------------------------===//
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//
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// This file contains logic for simplifying instructions based on information
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// about how they are used.
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//
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//===----------------------------------------------------------------------===//
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#include "InstCombineInternal.h"
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#include "llvm/Analysis/ValueTracking.h"
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#include "llvm/IR/GetElementPtrTypeIterator.h"
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#include "llvm/IR/IntrinsicInst.h"
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#include "llvm/IR/PatternMatch.h"
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#include "llvm/Support/KnownBits.h"
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#include "llvm/Transforms/InstCombine/InstCombiner.h"
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using namespace llvm;
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using namespace llvm::PatternMatch;
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#define DEBUG_TYPE "instcombine"
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/// Check to see if the specified operand of the specified instruction is a
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/// constant integer. If so, check to see if there are any bits set in the
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/// constant that are not demanded. If so, shrink the constant and return true.
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static bool ShrinkDemandedConstant(Instruction *I, unsigned OpNo,
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const APInt &Demanded) {
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assert(I && "No instruction?");
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assert(OpNo < I->getNumOperands() && "Operand index too large");
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// The operand must be a constant integer or splat integer.
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Value *Op = I->getOperand(OpNo);
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const APInt *C;
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if (!match(Op, m_APInt(C)))
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return false;
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// If there are no bits set that aren't demanded, nothing to do.
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if (C->isSubsetOf(Demanded))
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return false;
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// This instruction is producing bits that are not demanded. Shrink the RHS.
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I->setOperand(OpNo, ConstantInt::get(Op->getType(), *C & Demanded));
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return true;
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}
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/// Inst is an integer instruction that SimplifyDemandedBits knows about. See if
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/// the instruction has any properties that allow us to simplify its operands.
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bool InstCombinerImpl::SimplifyDemandedInstructionBits(Instruction &Inst) {
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unsigned BitWidth = Inst.getType()->getScalarSizeInBits();
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KnownBits Known(BitWidth);
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APInt DemandedMask(APInt::getAllOnes(BitWidth));
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Value *V = SimplifyDemandedUseBits(&Inst, DemandedMask, Known,
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0, &Inst);
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if (!V) return false;
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if (V == &Inst) return true;
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replaceInstUsesWith(Inst, V);
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return true;
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}
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/// This form of SimplifyDemandedBits simplifies the specified instruction
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/// operand if possible, updating it in place. It returns true if it made any
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/// change and false otherwise.
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bool InstCombinerImpl::SimplifyDemandedBits(Instruction *I, unsigned OpNo,
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const APInt &DemandedMask,
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KnownBits &Known, unsigned Depth) {
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Use &U = I->getOperandUse(OpNo);
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Value *NewVal = SimplifyDemandedUseBits(U.get(), DemandedMask, Known,
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Depth, I);
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if (!NewVal) return false;
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if (Instruction* OpInst = dyn_cast<Instruction>(U))
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salvageDebugInfo(*OpInst);
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replaceUse(U, NewVal);
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return true;
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}
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/// This function attempts to replace V with a simpler value based on the
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/// demanded bits. When this function is called, it is known that only the bits
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/// set in DemandedMask of the result of V are ever used downstream.
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/// Consequently, depending on the mask and V, it may be possible to replace V
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/// with a constant or one of its operands. In such cases, this function does
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/// the replacement and returns true. In all other cases, it returns false after
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/// analyzing the expression and setting KnownOne and known to be one in the
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/// expression. Known.Zero contains all the bits that are known to be zero in
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/// the expression. These are provided to potentially allow the caller (which
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/// might recursively be SimplifyDemandedBits itself) to simplify the
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/// expression.
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/// Known.One and Known.Zero always follow the invariant that:
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/// Known.One & Known.Zero == 0.
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/// That is, a bit can't be both 1 and 0. Note that the bits in Known.One and
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/// Known.Zero may only be accurate for those bits set in DemandedMask. Note
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/// also that the bitwidth of V, DemandedMask, Known.Zero and Known.One must all
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/// be the same.
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///
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/// This returns null if it did not change anything and it permits no
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/// simplification. This returns V itself if it did some simplification of V's
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/// operands based on the information about what bits are demanded. This returns
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/// some other non-null value if it found out that V is equal to another value
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/// in the context where the specified bits are demanded, but not for all users.
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Value *InstCombinerImpl::SimplifyDemandedUseBits(Value *V, APInt DemandedMask,
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KnownBits &Known,
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unsigned Depth,
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Instruction *CxtI) {
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assert(V != nullptr && "Null pointer of Value???");
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assert(Depth <= MaxAnalysisRecursionDepth && "Limit Search Depth");
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uint32_t BitWidth = DemandedMask.getBitWidth();
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Type *VTy = V->getType();
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assert(
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(!VTy->isIntOrIntVectorTy() || VTy->getScalarSizeInBits() == BitWidth) &&
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Known.getBitWidth() == BitWidth &&
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"Value *V, DemandedMask and Known must have same BitWidth");
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if (isa<Constant>(V)) {
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computeKnownBits(V, Known, Depth, CxtI);
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return nullptr;
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}
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Known.resetAll();
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if (DemandedMask.isZero()) // Not demanding any bits from V.
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return UndefValue::get(VTy);
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if (Depth == MaxAnalysisRecursionDepth)
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return nullptr;
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Instruction *I = dyn_cast<Instruction>(V);
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if (!I) {
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computeKnownBits(V, Known, Depth, CxtI);
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return nullptr; // Only analyze instructions.
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}
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// If there are multiple uses of this value and we aren't at the root, then
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// we can't do any simplifications of the operands, because DemandedMask
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// only reflects the bits demanded by *one* of the users.
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if (Depth != 0 && !I->hasOneUse())
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return SimplifyMultipleUseDemandedBits(I, DemandedMask, Known, Depth, CxtI);
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KnownBits LHSKnown(BitWidth), RHSKnown(BitWidth);
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// If this is the root being simplified, allow it to have multiple uses,
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// just set the DemandedMask to all bits so that we can try to simplify the
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// operands. This allows visitTruncInst (for example) to simplify the
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// operand of a trunc without duplicating all the logic below.
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if (Depth == 0 && !V->hasOneUse())
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DemandedMask.setAllBits();
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// Update flags after simplifying an operand based on the fact that some high
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// order bits are not demanded.
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auto disableWrapFlagsBasedOnUnusedHighBits = [](Instruction *I,
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unsigned NLZ) {
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if (NLZ > 0) {
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// Disable the nsw and nuw flags here: We can no longer guarantee that
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// we won't wrap after simplification. Removing the nsw/nuw flags is
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// legal here because the top bit is not demanded.
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I->setHasNoSignedWrap(false);
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I->setHasNoUnsignedWrap(false);
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}
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return I;
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};
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// If the high-bits of an ADD/SUB/MUL are not demanded, then we do not care
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// about the high bits of the operands.
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auto simplifyOperandsBasedOnUnusedHighBits = [&](APInt &DemandedFromOps) {
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unsigned NLZ = DemandedMask.countl_zero();
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// Right fill the mask of bits for the operands to demand the most
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// significant bit and all those below it.
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DemandedFromOps = APInt::getLowBitsSet(BitWidth, BitWidth - NLZ);
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if (ShrinkDemandedConstant(I, 0, DemandedFromOps) ||
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SimplifyDemandedBits(I, 0, DemandedFromOps, LHSKnown, Depth + 1) ||
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ShrinkDemandedConstant(I, 1, DemandedFromOps) ||
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SimplifyDemandedBits(I, 1, DemandedFromOps, RHSKnown, Depth + 1)) {
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disableWrapFlagsBasedOnUnusedHighBits(I, NLZ);
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return true;
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}
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return false;
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};
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switch (I->getOpcode()) {
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default:
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computeKnownBits(I, Known, Depth, CxtI);
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break;
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case Instruction::And: {
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// If either the LHS or the RHS are Zero, the result is zero.
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if (SimplifyDemandedBits(I, 1, DemandedMask, RHSKnown, Depth + 1) ||
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SimplifyDemandedBits(I, 0, DemandedMask & ~RHSKnown.Zero, LHSKnown,
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Depth + 1))
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return I;
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assert(!RHSKnown.hasConflict() && "Bits known to be one AND zero?");
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assert(!LHSKnown.hasConflict() && "Bits known to be one AND zero?");
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Known = analyzeKnownBitsFromAndXorOr(cast<Operator>(I), LHSKnown, RHSKnown,
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Depth, DL, &AC, CxtI, &DT);
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// If the client is only demanding bits that we know, return the known
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// constant.
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if (DemandedMask.isSubsetOf(Known.Zero | Known.One))
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return Constant::getIntegerValue(VTy, Known.One);
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// If all of the demanded bits are known 1 on one side, return the other.
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// These bits cannot contribute to the result of the 'and'.
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if (DemandedMask.isSubsetOf(LHSKnown.Zero | RHSKnown.One))
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return I->getOperand(0);
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if (DemandedMask.isSubsetOf(RHSKnown.Zero | LHSKnown.One))
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return I->getOperand(1);
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// If the RHS is a constant, see if we can simplify it.
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if (ShrinkDemandedConstant(I, 1, DemandedMask & ~LHSKnown.Zero))
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return I;
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break;
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}
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case Instruction::Or: {
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// If either the LHS or the RHS are One, the result is One.
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if (SimplifyDemandedBits(I, 1, DemandedMask, RHSKnown, Depth + 1) ||
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SimplifyDemandedBits(I, 0, DemandedMask & ~RHSKnown.One, LHSKnown,
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Depth + 1))
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return I;
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assert(!RHSKnown.hasConflict() && "Bits known to be one AND zero?");
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assert(!LHSKnown.hasConflict() && "Bits known to be one AND zero?");
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Known = analyzeKnownBitsFromAndXorOr(cast<Operator>(I), LHSKnown, RHSKnown,
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Depth, DL, &AC, CxtI, &DT);
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// If the client is only demanding bits that we know, return the known
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// constant.
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if (DemandedMask.isSubsetOf(Known.Zero | Known.One))
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return Constant::getIntegerValue(VTy, Known.One);
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// If all of the demanded bits are known zero on one side, return the other.
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// These bits cannot contribute to the result of the 'or'.
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if (DemandedMask.isSubsetOf(LHSKnown.One | RHSKnown.Zero))
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return I->getOperand(0);
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if (DemandedMask.isSubsetOf(RHSKnown.One | LHSKnown.Zero))
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return I->getOperand(1);
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// If the RHS is a constant, see if we can simplify it.
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if (ShrinkDemandedConstant(I, 1, DemandedMask))
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return I;
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break;
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}
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case Instruction::Xor: {
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if (SimplifyDemandedBits(I, 1, DemandedMask, RHSKnown, Depth + 1) ||
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SimplifyDemandedBits(I, 0, DemandedMask, LHSKnown, Depth + 1))
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return I;
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Value *LHS, *RHS;
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if (DemandedMask == 1 &&
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match(I->getOperand(0), m_Intrinsic<Intrinsic::ctpop>(m_Value(LHS))) &&
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match(I->getOperand(1), m_Intrinsic<Intrinsic::ctpop>(m_Value(RHS)))) {
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// (ctpop(X) ^ ctpop(Y)) & 1 --> ctpop(X^Y) & 1
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IRBuilderBase::InsertPointGuard Guard(Builder);
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Builder.SetInsertPoint(I);
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auto *Xor = Builder.CreateXor(LHS, RHS);
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return Builder.CreateUnaryIntrinsic(Intrinsic::ctpop, Xor);
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}
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assert(!RHSKnown.hasConflict() && "Bits known to be one AND zero?");
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assert(!LHSKnown.hasConflict() && "Bits known to be one AND zero?");
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Known = analyzeKnownBitsFromAndXorOr(cast<Operator>(I), LHSKnown, RHSKnown,
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Depth, DL, &AC, CxtI, &DT);
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// If the client is only demanding bits that we know, return the known
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// constant.
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if (DemandedMask.isSubsetOf(Known.Zero | Known.One))
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return Constant::getIntegerValue(VTy, Known.One);
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// If all of the demanded bits are known zero on one side, return the other.
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// These bits cannot contribute to the result of the 'xor'.
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if (DemandedMask.isSubsetOf(RHSKnown.Zero))
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return I->getOperand(0);
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if (DemandedMask.isSubsetOf(LHSKnown.Zero))
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return I->getOperand(1);
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// If all of the demanded bits are known to be zero on one side or the
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// other, turn this into an *inclusive* or.
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// e.g. (A & C1)^(B & C2) -> (A & C1)|(B & C2) iff C1&C2 == 0
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if (DemandedMask.isSubsetOf(RHSKnown.Zero | LHSKnown.Zero)) {
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Instruction *Or =
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BinaryOperator::CreateOr(I->getOperand(0), I->getOperand(1),
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I->getName());
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return InsertNewInstWith(Or, *I);
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}
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// If all of the demanded bits on one side are known, and all of the set
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// bits on that side are also known to be set on the other side, turn this
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// into an AND, as we know the bits will be cleared.
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// e.g. (X | C1) ^ C2 --> (X | C1) & ~C2 iff (C1&C2) == C2
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if (DemandedMask.isSubsetOf(RHSKnown.Zero|RHSKnown.One) &&
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RHSKnown.One.isSubsetOf(LHSKnown.One)) {
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Constant *AndC = Constant::getIntegerValue(VTy,
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~RHSKnown.One & DemandedMask);
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Instruction *And = BinaryOperator::CreateAnd(I->getOperand(0), AndC);
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return InsertNewInstWith(And, *I);
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}
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// If the RHS is a constant, see if we can change it. Don't alter a -1
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// constant because that's a canonical 'not' op, and that is better for
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// combining, SCEV, and codegen.
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const APInt *C;
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if (match(I->getOperand(1), m_APInt(C)) && !C->isAllOnes()) {
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if ((*C | ~DemandedMask).isAllOnes()) {
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// Force bits to 1 to create a 'not' op.
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I->setOperand(1, ConstantInt::getAllOnesValue(VTy));
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return I;
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}
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// If we can't turn this into a 'not', try to shrink the constant.
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if (ShrinkDemandedConstant(I, 1, DemandedMask))
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return I;
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}
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// If our LHS is an 'and' and if it has one use, and if any of the bits we
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// are flipping are known to be set, then the xor is just resetting those
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// bits to zero. We can just knock out bits from the 'and' and the 'xor',
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// simplifying both of them.
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if (Instruction *LHSInst = dyn_cast<Instruction>(I->getOperand(0))) {
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ConstantInt *AndRHS, *XorRHS;
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if (LHSInst->getOpcode() == Instruction::And && LHSInst->hasOneUse() &&
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match(I->getOperand(1), m_ConstantInt(XorRHS)) &&
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match(LHSInst->getOperand(1), m_ConstantInt(AndRHS)) &&
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(LHSKnown.One & RHSKnown.One & DemandedMask) != 0) {
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APInt NewMask = ~(LHSKnown.One & RHSKnown.One & DemandedMask);
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Constant *AndC = ConstantInt::get(VTy, NewMask & AndRHS->getValue());
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Instruction *NewAnd = BinaryOperator::CreateAnd(I->getOperand(0), AndC);
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InsertNewInstWith(NewAnd, *I);
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Constant *XorC = ConstantInt::get(VTy, NewMask & XorRHS->getValue());
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Instruction *NewXor = BinaryOperator::CreateXor(NewAnd, XorC);
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return InsertNewInstWith(NewXor, *I);
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}
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}
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break;
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}
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case Instruction::Select: {
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if (SimplifyDemandedBits(I, 2, DemandedMask, RHSKnown, Depth + 1) ||
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SimplifyDemandedBits(I, 1, DemandedMask, LHSKnown, Depth + 1))
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return I;
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assert(!RHSKnown.hasConflict() && "Bits known to be one AND zero?");
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assert(!LHSKnown.hasConflict() && "Bits known to be one AND zero?");
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// If the operands are constants, see if we can simplify them.
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// This is similar to ShrinkDemandedConstant, but for a select we want to
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// try to keep the selected constants the same as icmp value constants, if
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// we can. This helps not break apart (or helps put back together)
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// canonical patterns like min and max.
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auto CanonicalizeSelectConstant = [](Instruction *I, unsigned OpNo,
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const APInt &DemandedMask) {
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const APInt *SelC;
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if (!match(I->getOperand(OpNo), m_APInt(SelC)))
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return false;
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// Get the constant out of the ICmp, if there is one.
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// Only try this when exactly 1 operand is a constant (if both operands
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// are constant, the icmp should eventually simplify). Otherwise, we may
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// invert the transform that reduces set bits and infinite-loop.
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Value *X;
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const APInt *CmpC;
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ICmpInst::Predicate Pred;
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if (!match(I->getOperand(0), m_ICmp(Pred, m_Value(X), m_APInt(CmpC))) ||
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isa<Constant>(X) || CmpC->getBitWidth() != SelC->getBitWidth())
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return ShrinkDemandedConstant(I, OpNo, DemandedMask);
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// If the constant is already the same as the ICmp, leave it as-is.
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if (*CmpC == *SelC)
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return false;
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// If the constants are not already the same, but can be with the demand
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// mask, use the constant value from the ICmp.
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if ((*CmpC & DemandedMask) == (*SelC & DemandedMask)) {
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I->setOperand(OpNo, ConstantInt::get(I->getType(), *CmpC));
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return true;
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}
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return ShrinkDemandedConstant(I, OpNo, DemandedMask);
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};
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if (CanonicalizeSelectConstant(I, 1, DemandedMask) ||
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CanonicalizeSelectConstant(I, 2, DemandedMask))
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return I;
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// Only known if known in both the LHS and RHS.
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Known = KnownBits::commonBits(LHSKnown, RHSKnown);
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break;
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}
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case Instruction::Trunc: {
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// If we do not demand the high bits of a right-shifted and truncated value,
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// then we may be able to truncate it before the shift.
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Value *X;
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const APInt *C;
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if (match(I->getOperand(0), m_OneUse(m_LShr(m_Value(X), m_APInt(C))))) {
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// The shift amount must be valid (not poison) in the narrow type, and
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// it must not be greater than the high bits demanded of the result.
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if (C->ult(VTy->getScalarSizeInBits()) &&
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C->ule(DemandedMask.countl_zero())) {
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// trunc (lshr X, C) --> lshr (trunc X), C
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IRBuilderBase::InsertPointGuard Guard(Builder);
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Builder.SetInsertPoint(I);
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Value *Trunc = Builder.CreateTrunc(X, VTy);
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return Builder.CreateLShr(Trunc, C->getZExtValue());
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}
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}
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}
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[[fallthrough]];
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case Instruction::ZExt: {
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unsigned SrcBitWidth = I->getOperand(0)->getType()->getScalarSizeInBits();
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APInt InputDemandedMask = DemandedMask.zextOrTrunc(SrcBitWidth);
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KnownBits InputKnown(SrcBitWidth);
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if (SimplifyDemandedBits(I, 0, InputDemandedMask, InputKnown, Depth + 1))
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return I;
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assert(InputKnown.getBitWidth() == SrcBitWidth && "Src width changed?");
|
|
Known = InputKnown.zextOrTrunc(BitWidth);
|
|
assert(!Known.hasConflict() && "Bits known to be one AND zero?");
|
|
break;
|
|
}
|
|
case Instruction::BitCast:
|
|
if (!I->getOperand(0)->getType()->isIntOrIntVectorTy())
|
|
return nullptr; // vector->int or fp->int?
|
|
|
|
if (auto *DstVTy = dyn_cast<VectorType>(VTy)) {
|
|
if (auto *SrcVTy = dyn_cast<VectorType>(I->getOperand(0)->getType())) {
|
|
if (isa<ScalableVectorType>(DstVTy) ||
|
|
isa<ScalableVectorType>(SrcVTy) ||
|
|
cast<FixedVectorType>(DstVTy)->getNumElements() !=
|
|
cast<FixedVectorType>(SrcVTy)->getNumElements())
|
|
// Don't touch a bitcast between vectors of different element counts.
|
|
return nullptr;
|
|
} else
|
|
// Don't touch a scalar-to-vector bitcast.
|
|
return nullptr;
|
|
} else if (I->getOperand(0)->getType()->isVectorTy())
|
|
// Don't touch a vector-to-scalar bitcast.
|
|
return nullptr;
|
|
|
|
if (SimplifyDemandedBits(I, 0, DemandedMask, Known, Depth + 1))
|
|
return I;
|
|
assert(!Known.hasConflict() && "Bits known to be one AND zero?");
|
|
break;
|
|
case Instruction::SExt: {
|
|
// Compute the bits in the result that are not present in the input.
|
|
unsigned SrcBitWidth = I->getOperand(0)->getType()->getScalarSizeInBits();
|
|
|
|
APInt InputDemandedBits = DemandedMask.trunc(SrcBitWidth);
|
|
|
|
// If any of the sign extended bits are demanded, we know that the sign
|
|
// bit is demanded.
|
|
if (DemandedMask.getActiveBits() > SrcBitWidth)
|
|
InputDemandedBits.setBit(SrcBitWidth-1);
|
|
|
|
KnownBits InputKnown(SrcBitWidth);
|
|
if (SimplifyDemandedBits(I, 0, InputDemandedBits, InputKnown, Depth + 1))
|
|
return I;
|
|
|
|
// If the input sign bit is known zero, or if the NewBits are not demanded
|
|
// convert this into a zero extension.
|
|
if (InputKnown.isNonNegative() ||
|
|
DemandedMask.getActiveBits() <= SrcBitWidth) {
|
|
// Convert to ZExt cast.
|
|
CastInst *NewCast = new ZExtInst(I->getOperand(0), VTy, I->getName());
|
|
return InsertNewInstWith(NewCast, *I);
|
|
}
|
|
|
|
// If the sign bit of the input is known set or clear, then we know the
|
|
// top bits of the result.
|
|
Known = InputKnown.sext(BitWidth);
|
|
assert(!Known.hasConflict() && "Bits known to be one AND zero?");
|
|
break;
|
|
}
|
|
case Instruction::Add: {
|
|
if ((DemandedMask & 1) == 0) {
|
|
// If we do not need the low bit, try to convert bool math to logic:
|
|
// add iN (zext i1 X), (sext i1 Y) --> sext (~X & Y) to iN
|
|
Value *X, *Y;
|
|
if (match(I, m_c_Add(m_OneUse(m_ZExt(m_Value(X))),
|
|
m_OneUse(m_SExt(m_Value(Y))))) &&
|
|
X->getType()->isIntOrIntVectorTy(1) && X->getType() == Y->getType()) {
|
|
// Truth table for inputs and output signbits:
|
|
// X:0 | X:1
|
|
// ----------
|
|
// Y:0 | 0 | 0 |
|
|
// Y:1 | -1 | 0 |
|
|
// ----------
|
|
IRBuilderBase::InsertPointGuard Guard(Builder);
|
|
Builder.SetInsertPoint(I);
|
|
Value *AndNot = Builder.CreateAnd(Builder.CreateNot(X), Y);
|
|
return Builder.CreateSExt(AndNot, VTy);
|
|
}
|
|
|
|
// add iN (sext i1 X), (sext i1 Y) --> sext (X | Y) to iN
|
|
// TODO: Relax the one-use checks because we are removing an instruction?
|
|
if (match(I, m_Add(m_OneUse(m_SExt(m_Value(X))),
|
|
m_OneUse(m_SExt(m_Value(Y))))) &&
|
|
X->getType()->isIntOrIntVectorTy(1) && X->getType() == Y->getType()) {
|
|
// Truth table for inputs and output signbits:
|
|
// X:0 | X:1
|
|
// -----------
|
|
// Y:0 | -1 | -1 |
|
|
// Y:1 | -1 | 0 |
|
|
// -----------
|
|
IRBuilderBase::InsertPointGuard Guard(Builder);
|
|
Builder.SetInsertPoint(I);
|
|
Value *Or = Builder.CreateOr(X, Y);
|
|
return Builder.CreateSExt(Or, VTy);
|
|
}
|
|
}
|
|
|
|
// Right fill the mask of bits for the operands to demand the most
|
|
// significant bit and all those below it.
|
|
unsigned NLZ = DemandedMask.countl_zero();
|
|
APInt DemandedFromOps = APInt::getLowBitsSet(BitWidth, BitWidth - NLZ);
|
|
if (ShrinkDemandedConstant(I, 1, DemandedFromOps) ||
|
|
SimplifyDemandedBits(I, 1, DemandedFromOps, RHSKnown, Depth + 1))
|
|
return disableWrapFlagsBasedOnUnusedHighBits(I, NLZ);
|
|
|
|
// If low order bits are not demanded and known to be zero in one operand,
|
|
// then we don't need to demand them from the other operand, since they
|
|
// can't cause overflow into any bits that are demanded in the result.
|
|
unsigned NTZ = (~DemandedMask & RHSKnown.Zero).countr_one();
|
|
APInt DemandedFromLHS = DemandedFromOps;
|
|
DemandedFromLHS.clearLowBits(NTZ);
|
|
if (ShrinkDemandedConstant(I, 0, DemandedFromLHS) ||
|
|
SimplifyDemandedBits(I, 0, DemandedFromLHS, LHSKnown, Depth + 1))
|
|
return disableWrapFlagsBasedOnUnusedHighBits(I, NLZ);
|
|
|
|
// If we are known to be adding zeros to every bit below
|
|
// the highest demanded bit, we just return the other side.
|
|
if (DemandedFromOps.isSubsetOf(RHSKnown.Zero))
|
|
return I->getOperand(0);
|
|
if (DemandedFromOps.isSubsetOf(LHSKnown.Zero))
|
|
return I->getOperand(1);
|
|
|
|
// Otherwise just compute the known bits of the result.
|
|
bool NSW = cast<OverflowingBinaryOperator>(I)->hasNoSignedWrap();
|
|
Known = KnownBits::computeForAddSub(true, NSW, LHSKnown, RHSKnown);
|
|
break;
|
|
}
|
|
case Instruction::Sub: {
|
|
// Right fill the mask of bits for the operands to demand the most
|
|
// significant bit and all those below it.
|
|
unsigned NLZ = DemandedMask.countl_zero();
|
|
APInt DemandedFromOps = APInt::getLowBitsSet(BitWidth, BitWidth - NLZ);
|
|
if (ShrinkDemandedConstant(I, 1, DemandedFromOps) ||
|
|
SimplifyDemandedBits(I, 1, DemandedFromOps, RHSKnown, Depth + 1))
|
|
return disableWrapFlagsBasedOnUnusedHighBits(I, NLZ);
|
|
|
|
// If low order bits are not demanded and are known to be zero in RHS,
|
|
// then we don't need to demand them from LHS, since they can't cause a
|
|
// borrow from any bits that are demanded in the result.
|
|
unsigned NTZ = (~DemandedMask & RHSKnown.Zero).countr_one();
|
|
APInt DemandedFromLHS = DemandedFromOps;
|
|
DemandedFromLHS.clearLowBits(NTZ);
|
|
if (ShrinkDemandedConstant(I, 0, DemandedFromLHS) ||
|
|
SimplifyDemandedBits(I, 0, DemandedFromLHS, LHSKnown, Depth + 1))
|
|
return disableWrapFlagsBasedOnUnusedHighBits(I, NLZ);
|
|
|
|
// If we are known to be subtracting zeros from every bit below
|
|
// the highest demanded bit, we just return the other side.
|
|
if (DemandedFromOps.isSubsetOf(RHSKnown.Zero))
|
|
return I->getOperand(0);
|
|
// We can't do this with the LHS for subtraction, unless we are only
|
|
// demanding the LSB.
|
|
if (DemandedFromOps.isOne() && DemandedFromOps.isSubsetOf(LHSKnown.Zero))
|
|
return I->getOperand(1);
|
|
|
|
// Otherwise just compute the known bits of the result.
|
|
bool NSW = cast<OverflowingBinaryOperator>(I)->hasNoSignedWrap();
|
|
Known = KnownBits::computeForAddSub(false, NSW, LHSKnown, RHSKnown);
|
|
break;
|
|
}
|
|
case Instruction::Mul: {
|
|
APInt DemandedFromOps;
|
|
if (simplifyOperandsBasedOnUnusedHighBits(DemandedFromOps))
|
|
return I;
|
|
|
|
if (DemandedMask.isPowerOf2()) {
|
|
// The LSB of X*Y is set only if (X & 1) == 1 and (Y & 1) == 1.
|
|
// If we demand exactly one bit N and we have "X * (C' << N)" where C' is
|
|
// odd (has LSB set), then the left-shifted low bit of X is the answer.
|
|
unsigned CTZ = DemandedMask.countr_zero();
|
|
const APInt *C;
|
|
if (match(I->getOperand(1), m_APInt(C)) && C->countr_zero() == CTZ) {
|
|
Constant *ShiftC = ConstantInt::get(VTy, CTZ);
|
|
Instruction *Shl = BinaryOperator::CreateShl(I->getOperand(0), ShiftC);
|
|
return InsertNewInstWith(Shl, *I);
|
|
}
|
|
}
|
|
// For a squared value "X * X", the bottom 2 bits are 0 and X[0] because:
|
|
// X * X is odd iff X is odd.
|
|
// 'Quadratic Reciprocity': X * X -> 0 for bit[1]
|
|
if (I->getOperand(0) == I->getOperand(1) && DemandedMask.ult(4)) {
|
|
Constant *One = ConstantInt::get(VTy, 1);
|
|
Instruction *And1 = BinaryOperator::CreateAnd(I->getOperand(0), One);
|
|
return InsertNewInstWith(And1, *I);
|
|
}
|
|
|
|
computeKnownBits(I, Known, Depth, CxtI);
|
|
break;
|
|
}
|
|
case Instruction::Shl: {
|
|
const APInt *SA;
|
|
if (match(I->getOperand(1), m_APInt(SA))) {
|
|
const APInt *ShrAmt;
|
|
if (match(I->getOperand(0), m_Shr(m_Value(), m_APInt(ShrAmt))))
|
|
if (Instruction *Shr = dyn_cast<Instruction>(I->getOperand(0)))
|
|
if (Value *R = simplifyShrShlDemandedBits(Shr, *ShrAmt, I, *SA,
|
|
DemandedMask, Known))
|
|
return R;
|
|
|
|
// TODO: If we only want bits that already match the signbit then we don't
|
|
// need to shift.
|
|
|
|
// If we can pre-shift a right-shifted constant to the left without
|
|
// losing any high bits amd we don't demand the low bits, then eliminate
|
|
// the left-shift:
|
|
// (C >> X) << LeftShiftAmtC --> (C << RightShiftAmtC) >> X
|
|
uint64_t ShiftAmt = SA->getLimitedValue(BitWidth-1);
|
|
Value *X;
|
|
Constant *C;
|
|
if (DemandedMask.countr_zero() >= ShiftAmt &&
|
|
match(I->getOperand(0), m_LShr(m_ImmConstant(C), m_Value(X)))) {
|
|
Constant *LeftShiftAmtC = ConstantInt::get(VTy, ShiftAmt);
|
|
Constant *NewC = ConstantExpr::getShl(C, LeftShiftAmtC);
|
|
if (ConstantExpr::getLShr(NewC, LeftShiftAmtC) == C) {
|
|
Instruction *Lshr = BinaryOperator::CreateLShr(NewC, X);
|
|
return InsertNewInstWith(Lshr, *I);
|
|
}
|
|
}
|
|
|
|
APInt DemandedMaskIn(DemandedMask.lshr(ShiftAmt));
|
|
|
|
// If the shift is NUW/NSW, then it does demand the high bits.
|
|
ShlOperator *IOp = cast<ShlOperator>(I);
|
|
if (IOp->hasNoSignedWrap())
|
|
DemandedMaskIn.setHighBits(ShiftAmt+1);
|
|
else if (IOp->hasNoUnsignedWrap())
|
|
DemandedMaskIn.setHighBits(ShiftAmt);
|
|
|
|
if (SimplifyDemandedBits(I, 0, DemandedMaskIn, Known, Depth + 1))
|
|
return I;
|
|
assert(!Known.hasConflict() && "Bits known to be one AND zero?");
|
|
|
|
bool SignBitZero = Known.Zero.isSignBitSet();
|
|
bool SignBitOne = Known.One.isSignBitSet();
|
|
Known.Zero <<= ShiftAmt;
|
|
Known.One <<= ShiftAmt;
|
|
// low bits known zero.
|
|
if (ShiftAmt)
|
|
Known.Zero.setLowBits(ShiftAmt);
|
|
|
|
// If this shift has "nsw" keyword, then the result is either a poison
|
|
// value or has the same sign bit as the first operand.
|
|
if (IOp->hasNoSignedWrap()) {
|
|
if (SignBitZero)
|
|
Known.Zero.setSignBit();
|
|
else if (SignBitOne)
|
|
Known.One.setSignBit();
|
|
if (Known.hasConflict())
|
|
return UndefValue::get(VTy);
|
|
}
|
|
} else {
|
|
// This is a variable shift, so we can't shift the demand mask by a known
|
|
// amount. But if we are not demanding high bits, then we are not
|
|
// demanding those bits from the pre-shifted operand either.
|
|
if (unsigned CTLZ = DemandedMask.countl_zero()) {
|
|
APInt DemandedFromOp(APInt::getLowBitsSet(BitWidth, BitWidth - CTLZ));
|
|
if (SimplifyDemandedBits(I, 0, DemandedFromOp, Known, Depth + 1)) {
|
|
// We can't guarantee that nsw/nuw hold after simplifying the operand.
|
|
I->dropPoisonGeneratingFlags();
|
|
return I;
|
|
}
|
|
}
|
|
computeKnownBits(I, Known, Depth, CxtI);
|
|
}
|
|
break;
|
|
}
|
|
case Instruction::LShr: {
|
|
const APInt *SA;
|
|
if (match(I->getOperand(1), m_APInt(SA))) {
|
|
uint64_t ShiftAmt = SA->getLimitedValue(BitWidth-1);
|
|
|
|
// If we are just demanding the shifted sign bit and below, then this can
|
|
// be treated as an ASHR in disguise.
|
|
if (DemandedMask.countl_zero() >= ShiftAmt) {
|
|
// If we only want bits that already match the signbit then we don't
|
|
// need to shift.
|
|
unsigned NumHiDemandedBits = BitWidth - DemandedMask.countr_zero();
|
|
unsigned SignBits =
|
|
ComputeNumSignBits(I->getOperand(0), Depth + 1, CxtI);
|
|
if (SignBits >= NumHiDemandedBits)
|
|
return I->getOperand(0);
|
|
|
|
// If we can pre-shift a left-shifted constant to the right without
|
|
// losing any low bits (we already know we don't demand the high bits),
|
|
// then eliminate the right-shift:
|
|
// (C << X) >> RightShiftAmtC --> (C >> RightShiftAmtC) << X
|
|
Value *X;
|
|
Constant *C;
|
|
if (match(I->getOperand(0), m_Shl(m_ImmConstant(C), m_Value(X)))) {
|
|
Constant *RightShiftAmtC = ConstantInt::get(VTy, ShiftAmt);
|
|
Constant *NewC = ConstantExpr::getLShr(C, RightShiftAmtC);
|
|
if (ConstantExpr::getShl(NewC, RightShiftAmtC) == C) {
|
|
Instruction *Shl = BinaryOperator::CreateShl(NewC, X);
|
|
return InsertNewInstWith(Shl, *I);
|
|
}
|
|
}
|
|
}
|
|
|
|
// Unsigned shift right.
|
|
APInt DemandedMaskIn(DemandedMask.shl(ShiftAmt));
|
|
|
|
// If the shift is exact, then it does demand the low bits (and knows that
|
|
// they are zero).
|
|
if (cast<LShrOperator>(I)->isExact())
|
|
DemandedMaskIn.setLowBits(ShiftAmt);
|
|
|
|
if (SimplifyDemandedBits(I, 0, DemandedMaskIn, Known, Depth + 1))
|
|
return I;
|
|
assert(!Known.hasConflict() && "Bits known to be one AND zero?");
|
|
Known.Zero.lshrInPlace(ShiftAmt);
|
|
Known.One.lshrInPlace(ShiftAmt);
|
|
if (ShiftAmt)
|
|
Known.Zero.setHighBits(ShiftAmt); // high bits known zero.
|
|
} else {
|
|
computeKnownBits(I, Known, Depth, CxtI);
|
|
}
|
|
break;
|
|
}
|
|
case Instruction::AShr: {
|
|
unsigned SignBits = ComputeNumSignBits(I->getOperand(0), Depth + 1, CxtI);
|
|
|
|
// If we only want bits that already match the signbit then we don't need
|
|
// to shift.
|
|
unsigned NumHiDemandedBits = BitWidth - DemandedMask.countr_zero();
|
|
if (SignBits >= NumHiDemandedBits)
|
|
return I->getOperand(0);
|
|
|
|
// If this is an arithmetic shift right and only the low-bit is set, we can
|
|
// always convert this into a logical shr, even if the shift amount is
|
|
// variable. The low bit of the shift cannot be an input sign bit unless
|
|
// the shift amount is >= the size of the datatype, which is undefined.
|
|
if (DemandedMask.isOne()) {
|
|
// Perform the logical shift right.
|
|
Instruction *NewVal = BinaryOperator::CreateLShr(
|
|
I->getOperand(0), I->getOperand(1), I->getName());
|
|
return InsertNewInstWith(NewVal, *I);
|
|
}
|
|
|
|
const APInt *SA;
|
|
if (match(I->getOperand(1), m_APInt(SA))) {
|
|
uint32_t ShiftAmt = SA->getLimitedValue(BitWidth-1);
|
|
|
|
// Signed shift right.
|
|
APInt DemandedMaskIn(DemandedMask.shl(ShiftAmt));
|
|
// If any of the high bits are demanded, we should set the sign bit as
|
|
// demanded.
|
|
if (DemandedMask.countl_zero() <= ShiftAmt)
|
|
DemandedMaskIn.setSignBit();
|
|
|
|
// If the shift is exact, then it does demand the low bits (and knows that
|
|
// they are zero).
|
|
if (cast<AShrOperator>(I)->isExact())
|
|
DemandedMaskIn.setLowBits(ShiftAmt);
|
|
|
|
if (SimplifyDemandedBits(I, 0, DemandedMaskIn, Known, Depth + 1))
|
|
return I;
|
|
|
|
assert(!Known.hasConflict() && "Bits known to be one AND zero?");
|
|
// Compute the new bits that are at the top now plus sign bits.
|
|
APInt HighBits(APInt::getHighBitsSet(
|
|
BitWidth, std::min(SignBits + ShiftAmt - 1, BitWidth)));
|
|
Known.Zero.lshrInPlace(ShiftAmt);
|
|
Known.One.lshrInPlace(ShiftAmt);
|
|
|
|
// If the input sign bit is known to be zero, or if none of the top bits
|
|
// are demanded, turn this into an unsigned shift right.
|
|
assert(BitWidth > ShiftAmt && "Shift amount not saturated?");
|
|
if (Known.Zero[BitWidth-ShiftAmt-1] ||
|
|
!DemandedMask.intersects(HighBits)) {
|
|
BinaryOperator *LShr = BinaryOperator::CreateLShr(I->getOperand(0),
|
|
I->getOperand(1));
|
|
LShr->setIsExact(cast<BinaryOperator>(I)->isExact());
|
|
return InsertNewInstWith(LShr, *I);
|
|
} else if (Known.One[BitWidth-ShiftAmt-1]) { // New bits are known one.
|
|
Known.One |= HighBits;
|
|
}
|
|
} else {
|
|
computeKnownBits(I, Known, Depth, CxtI);
|
|
}
|
|
break;
|
|
}
|
|
case Instruction::UDiv: {
|
|
// UDiv doesn't demand low bits that are zero in the divisor.
|
|
const APInt *SA;
|
|
if (match(I->getOperand(1), m_APInt(SA))) {
|
|
// TODO: Take the demanded mask of the result into account.
|
|
unsigned RHSTrailingZeros = SA->countr_zero();
|
|
APInt DemandedMaskIn =
|
|
APInt::getHighBitsSet(BitWidth, BitWidth - RHSTrailingZeros);
|
|
if (SimplifyDemandedBits(I, 0, DemandedMaskIn, LHSKnown, Depth + 1)) {
|
|
// We can't guarantee that "exact" is still true after changing the
|
|
// the dividend.
|
|
I->dropPoisonGeneratingFlags();
|
|
return I;
|
|
}
|
|
|
|
// Increase high zero bits from the input.
|
|
Known.Zero.setHighBits(
|
|
std::min(BitWidth, LHSKnown.Zero.countl_one() + RHSTrailingZeros));
|
|
} else {
|
|
computeKnownBits(I, Known, Depth, CxtI);
|
|
}
|
|
break;
|
|
}
|
|
case Instruction::SRem: {
|
|
const APInt *Rem;
|
|
if (match(I->getOperand(1), m_APInt(Rem))) {
|
|
// X % -1 demands all the bits because we don't want to introduce
|
|
// INT_MIN % -1 (== undef) by accident.
|
|
if (Rem->isAllOnes())
|
|
break;
|
|
APInt RA = Rem->abs();
|
|
if (RA.isPowerOf2()) {
|
|
if (DemandedMask.ult(RA)) // srem won't affect demanded bits
|
|
return I->getOperand(0);
|
|
|
|
APInt LowBits = RA - 1;
|
|
APInt Mask2 = LowBits | APInt::getSignMask(BitWidth);
|
|
if (SimplifyDemandedBits(I, 0, Mask2, LHSKnown, Depth + 1))
|
|
return I;
|
|
|
|
// The low bits of LHS are unchanged by the srem.
|
|
Known.Zero = LHSKnown.Zero & LowBits;
|
|
Known.One = LHSKnown.One & LowBits;
|
|
|
|
// If LHS is non-negative or has all low bits zero, then the upper bits
|
|
// are all zero.
|
|
if (LHSKnown.isNonNegative() || LowBits.isSubsetOf(LHSKnown.Zero))
|
|
Known.Zero |= ~LowBits;
|
|
|
|
// If LHS is negative and not all low bits are zero, then the upper bits
|
|
// are all one.
|
|
if (LHSKnown.isNegative() && LowBits.intersects(LHSKnown.One))
|
|
Known.One |= ~LowBits;
|
|
|
|
assert(!Known.hasConflict() && "Bits known to be one AND zero?");
|
|
break;
|
|
}
|
|
}
|
|
|
|
// The sign bit is the LHS's sign bit, except when the result of the
|
|
// remainder is zero.
|
|
if (DemandedMask.isSignBitSet()) {
|
|
computeKnownBits(I->getOperand(0), LHSKnown, Depth + 1, CxtI);
|
|
// If it's known zero, our sign bit is also zero.
|
|
if (LHSKnown.isNonNegative())
|
|
Known.makeNonNegative();
|
|
}
|
|
break;
|
|
}
|
|
case Instruction::URem: {
|
|
KnownBits Known2(BitWidth);
|
|
APInt AllOnes = APInt::getAllOnes(BitWidth);
|
|
if (SimplifyDemandedBits(I, 0, AllOnes, Known2, Depth + 1) ||
|
|
SimplifyDemandedBits(I, 1, AllOnes, Known2, Depth + 1))
|
|
return I;
|
|
|
|
unsigned Leaders = Known2.countMinLeadingZeros();
|
|
Known.Zero = APInt::getHighBitsSet(BitWidth, Leaders) & DemandedMask;
|
|
break;
|
|
}
|
|
case Instruction::Call: {
|
|
bool KnownBitsComputed = false;
|
|
if (IntrinsicInst *II = dyn_cast<IntrinsicInst>(I)) {
|
|
switch (II->getIntrinsicID()) {
|
|
case Intrinsic::abs: {
|
|
if (DemandedMask == 1)
|
|
return II->getArgOperand(0);
|
|
break;
|
|
}
|
|
case Intrinsic::ctpop: {
|
|
// Checking if the number of clear bits is odd (parity)? If the type has
|
|
// an even number of bits, that's the same as checking if the number of
|
|
// set bits is odd, so we can eliminate the 'not' op.
|
|
Value *X;
|
|
if (DemandedMask == 1 && VTy->getScalarSizeInBits() % 2 == 0 &&
|
|
match(II->getArgOperand(0), m_Not(m_Value(X)))) {
|
|
Function *Ctpop = Intrinsic::getDeclaration(
|
|
II->getModule(), Intrinsic::ctpop, VTy);
|
|
return InsertNewInstWith(CallInst::Create(Ctpop, {X}), *I);
|
|
}
|
|
break;
|
|
}
|
|
case Intrinsic::bswap: {
|
|
// If the only bits demanded come from one byte of the bswap result,
|
|
// just shift the input byte into position to eliminate the bswap.
|
|
unsigned NLZ = DemandedMask.countl_zero();
|
|
unsigned NTZ = DemandedMask.countr_zero();
|
|
|
|
// Round NTZ down to the next byte. If we have 11 trailing zeros, then
|
|
// we need all the bits down to bit 8. Likewise, round NLZ. If we
|
|
// have 14 leading zeros, round to 8.
|
|
NLZ = alignDown(NLZ, 8);
|
|
NTZ = alignDown(NTZ, 8);
|
|
// If we need exactly one byte, we can do this transformation.
|
|
if (BitWidth - NLZ - NTZ == 8) {
|
|
// Replace this with either a left or right shift to get the byte into
|
|
// the right place.
|
|
Instruction *NewVal;
|
|
if (NLZ > NTZ)
|
|
NewVal = BinaryOperator::CreateLShr(
|
|
II->getArgOperand(0), ConstantInt::get(VTy, NLZ - NTZ));
|
|
else
|
|
NewVal = BinaryOperator::CreateShl(
|
|
II->getArgOperand(0), ConstantInt::get(VTy, NTZ - NLZ));
|
|
NewVal->takeName(I);
|
|
return InsertNewInstWith(NewVal, *I);
|
|
}
|
|
break;
|
|
}
|
|
case Intrinsic::fshr:
|
|
case Intrinsic::fshl: {
|
|
const APInt *SA;
|
|
if (!match(I->getOperand(2), m_APInt(SA)))
|
|
break;
|
|
|
|
// Normalize to funnel shift left. APInt shifts of BitWidth are well-
|
|
// defined, so no need to special-case zero shifts here.
|
|
uint64_t ShiftAmt = SA->urem(BitWidth);
|
|
if (II->getIntrinsicID() == Intrinsic::fshr)
|
|
ShiftAmt = BitWidth - ShiftAmt;
|
|
|
|
APInt DemandedMaskLHS(DemandedMask.lshr(ShiftAmt));
|
|
APInt DemandedMaskRHS(DemandedMask.shl(BitWidth - ShiftAmt));
|
|
if (SimplifyDemandedBits(I, 0, DemandedMaskLHS, LHSKnown, Depth + 1) ||
|
|
SimplifyDemandedBits(I, 1, DemandedMaskRHS, RHSKnown, Depth + 1))
|
|
return I;
|
|
|
|
Known.Zero = LHSKnown.Zero.shl(ShiftAmt) |
|
|
RHSKnown.Zero.lshr(BitWidth - ShiftAmt);
|
|
Known.One = LHSKnown.One.shl(ShiftAmt) |
|
|
RHSKnown.One.lshr(BitWidth - ShiftAmt);
|
|
KnownBitsComputed = true;
|
|
break;
|
|
}
|
|
case Intrinsic::umax: {
|
|
// UMax(A, C) == A if ...
|
|
// The lowest non-zero bit of DemandMask is higher than the highest
|
|
// non-zero bit of C.
|
|
const APInt *C;
|
|
unsigned CTZ = DemandedMask.countr_zero();
|
|
if (match(II->getArgOperand(1), m_APInt(C)) &&
|
|
CTZ >= C->getActiveBits())
|
|
return II->getArgOperand(0);
|
|
break;
|
|
}
|
|
case Intrinsic::umin: {
|
|
// UMin(A, C) == A if ...
|
|
// The lowest non-zero bit of DemandMask is higher than the highest
|
|
// non-one bit of C.
|
|
// This comes from using DeMorgans on the above umax example.
|
|
const APInt *C;
|
|
unsigned CTZ = DemandedMask.countr_zero();
|
|
if (match(II->getArgOperand(1), m_APInt(C)) &&
|
|
CTZ >= C->getBitWidth() - C->countl_one())
|
|
return II->getArgOperand(0);
|
|
break;
|
|
}
|
|
default: {
|
|
// Handle target specific intrinsics
|
|
std::optional<Value *> V = targetSimplifyDemandedUseBitsIntrinsic(
|
|
*II, DemandedMask, Known, KnownBitsComputed);
|
|
if (V)
|
|
return *V;
|
|
break;
|
|
}
|
|
}
|
|
}
|
|
|
|
if (!KnownBitsComputed)
|
|
computeKnownBits(V, Known, Depth, CxtI);
|
|
break;
|
|
}
|
|
}
|
|
|
|
// If the client is only demanding bits that we know, return the known
|
|
// constant.
|
|
if (DemandedMask.isSubsetOf(Known.Zero|Known.One))
|
|
return Constant::getIntegerValue(VTy, Known.One);
|
|
return nullptr;
|
|
}
|
|
|
|
/// Helper routine of SimplifyDemandedUseBits. It computes Known
|
|
/// bits. It also tries to handle simplifications that can be done based on
|
|
/// DemandedMask, but without modifying the Instruction.
|
|
Value *InstCombinerImpl::SimplifyMultipleUseDemandedBits(
|
|
Instruction *I, const APInt &DemandedMask, KnownBits &Known, unsigned Depth,
|
|
Instruction *CxtI) {
|
|
unsigned BitWidth = DemandedMask.getBitWidth();
|
|
Type *ITy = I->getType();
|
|
|
|
KnownBits LHSKnown(BitWidth);
|
|
KnownBits RHSKnown(BitWidth);
|
|
|
|
// Despite the fact that we can't simplify this instruction in all User's
|
|
// context, we can at least compute the known bits, and we can
|
|
// do simplifications that apply to *just* the one user if we know that
|
|
// this instruction has a simpler value in that context.
|
|
switch (I->getOpcode()) {
|
|
case Instruction::And: {
|
|
computeKnownBits(I->getOperand(1), RHSKnown, Depth + 1, CxtI);
|
|
computeKnownBits(I->getOperand(0), LHSKnown, Depth + 1, CxtI);
|
|
Known = LHSKnown & RHSKnown;
|
|
|
|
// If the client is only demanding bits that we know, return the known
|
|
// constant.
|
|
if (DemandedMask.isSubsetOf(Known.Zero | Known.One))
|
|
return Constant::getIntegerValue(ITy, Known.One);
|
|
|
|
// If all of the demanded bits are known 1 on one side, return the other.
|
|
// These bits cannot contribute to the result of the 'and' in this context.
|
|
if (DemandedMask.isSubsetOf(LHSKnown.Zero | RHSKnown.One))
|
|
return I->getOperand(0);
|
|
if (DemandedMask.isSubsetOf(RHSKnown.Zero | LHSKnown.One))
|
|
return I->getOperand(1);
|
|
|
|
break;
|
|
}
|
|
case Instruction::Or: {
|
|
computeKnownBits(I->getOperand(1), RHSKnown, Depth + 1, CxtI);
|
|
computeKnownBits(I->getOperand(0), LHSKnown, Depth + 1, CxtI);
|
|
Known = LHSKnown | RHSKnown;
|
|
|
|
// If the client is only demanding bits that we know, return the known
|
|
// constant.
|
|
if (DemandedMask.isSubsetOf(Known.Zero | Known.One))
|
|
return Constant::getIntegerValue(ITy, Known.One);
|
|
|
|
// We can simplify (X|Y) -> X or Y in the user's context if we know that
|
|
// only bits from X or Y are demanded.
|
|
// If all of the demanded bits are known zero on one side, return the other.
|
|
// These bits cannot contribute to the result of the 'or' in this context.
|
|
if (DemandedMask.isSubsetOf(LHSKnown.One | RHSKnown.Zero))
|
|
return I->getOperand(0);
|
|
if (DemandedMask.isSubsetOf(RHSKnown.One | LHSKnown.Zero))
|
|
return I->getOperand(1);
|
|
|
|
break;
|
|
}
|
|
case Instruction::Xor: {
|
|
computeKnownBits(I->getOperand(1), RHSKnown, Depth + 1, CxtI);
|
|
computeKnownBits(I->getOperand(0), LHSKnown, Depth + 1, CxtI);
|
|
Known = LHSKnown ^ RHSKnown;
|
|
|
|
// If the client is only demanding bits that we know, return the known
|
|
// constant.
|
|
if (DemandedMask.isSubsetOf(Known.Zero | Known.One))
|
|
return Constant::getIntegerValue(ITy, Known.One);
|
|
|
|
// We can simplify (X^Y) -> X or Y in the user's context if we know that
|
|
// only bits from X or Y are demanded.
|
|
// If all of the demanded bits are known zero on one side, return the other.
|
|
if (DemandedMask.isSubsetOf(RHSKnown.Zero))
|
|
return I->getOperand(0);
|
|
if (DemandedMask.isSubsetOf(LHSKnown.Zero))
|
|
return I->getOperand(1);
|
|
|
|
break;
|
|
}
|
|
case Instruction::Add: {
|
|
unsigned NLZ = DemandedMask.countl_zero();
|
|
APInt DemandedFromOps = APInt::getLowBitsSet(BitWidth, BitWidth - NLZ);
|
|
|
|
// If an operand adds zeros to every bit below the highest demanded bit,
|
|
// that operand doesn't change the result. Return the other side.
|
|
computeKnownBits(I->getOperand(1), RHSKnown, Depth + 1, CxtI);
|
|
if (DemandedFromOps.isSubsetOf(RHSKnown.Zero))
|
|
return I->getOperand(0);
|
|
|
|
computeKnownBits(I->getOperand(0), LHSKnown, Depth + 1, CxtI);
|
|
if (DemandedFromOps.isSubsetOf(LHSKnown.Zero))
|
|
return I->getOperand(1);
|
|
|
|
break;
|
|
}
|
|
case Instruction::Sub: {
|
|
unsigned NLZ = DemandedMask.countl_zero();
|
|
APInt DemandedFromOps = APInt::getLowBitsSet(BitWidth, BitWidth - NLZ);
|
|
|
|
// If an operand subtracts zeros from every bit below the highest demanded
|
|
// bit, that operand doesn't change the result. Return the other side.
|
|
computeKnownBits(I->getOperand(1), RHSKnown, Depth + 1, CxtI);
|
|
if (DemandedFromOps.isSubsetOf(RHSKnown.Zero))
|
|
return I->getOperand(0);
|
|
|
|
break;
|
|
}
|
|
case Instruction::AShr: {
|
|
// Compute the Known bits to simplify things downstream.
|
|
computeKnownBits(I, Known, Depth, CxtI);
|
|
|
|
// If this user is only demanding bits that we know, return the known
|
|
// constant.
|
|
if (DemandedMask.isSubsetOf(Known.Zero | Known.One))
|
|
return Constant::getIntegerValue(ITy, Known.One);
|
|
|
|
// If the right shift operand 0 is a result of a left shift by the same
|
|
// amount, this is probably a zero/sign extension, which may be unnecessary,
|
|
// if we do not demand any of the new sign bits. So, return the original
|
|
// operand instead.
|
|
const APInt *ShiftRC;
|
|
const APInt *ShiftLC;
|
|
Value *X;
|
|
unsigned BitWidth = DemandedMask.getBitWidth();
|
|
if (match(I,
|
|
m_AShr(m_Shl(m_Value(X), m_APInt(ShiftLC)), m_APInt(ShiftRC))) &&
|
|
ShiftLC == ShiftRC && ShiftLC->ult(BitWidth) &&
|
|
DemandedMask.isSubsetOf(APInt::getLowBitsSet(
|
|
BitWidth, BitWidth - ShiftRC->getZExtValue()))) {
|
|
return X;
|
|
}
|
|
|
|
break;
|
|
}
|
|
default:
|
|
// Compute the Known bits to simplify things downstream.
|
|
computeKnownBits(I, Known, Depth, CxtI);
|
|
|
|
// If this user is only demanding bits that we know, return the known
|
|
// constant.
|
|
if (DemandedMask.isSubsetOf(Known.Zero|Known.One))
|
|
return Constant::getIntegerValue(ITy, Known.One);
|
|
|
|
break;
|
|
}
|
|
|
|
return nullptr;
|
|
}
|
|
|
|
/// Helper routine of SimplifyDemandedUseBits. It tries to simplify
|
|
/// "E1 = (X lsr C1) << C2", where the C1 and C2 are constant, into
|
|
/// "E2 = X << (C2 - C1)" or "E2 = X >> (C1 - C2)", depending on the sign
|
|
/// of "C2-C1".
|
|
///
|
|
/// Suppose E1 and E2 are generally different in bits S={bm, bm+1,
|
|
/// ..., bn}, without considering the specific value X is holding.
|
|
/// This transformation is legal iff one of following conditions is hold:
|
|
/// 1) All the bit in S are 0, in this case E1 == E2.
|
|
/// 2) We don't care those bits in S, per the input DemandedMask.
|
|
/// 3) Combination of 1) and 2). Some bits in S are 0, and we don't care the
|
|
/// rest bits.
|
|
///
|
|
/// Currently we only test condition 2).
|
|
///
|
|
/// As with SimplifyDemandedUseBits, it returns NULL if the simplification was
|
|
/// not successful.
|
|
Value *InstCombinerImpl::simplifyShrShlDemandedBits(
|
|
Instruction *Shr, const APInt &ShrOp1, Instruction *Shl,
|
|
const APInt &ShlOp1, const APInt &DemandedMask, KnownBits &Known) {
|
|
if (!ShlOp1 || !ShrOp1)
|
|
return nullptr; // No-op.
|
|
|
|
Value *VarX = Shr->getOperand(0);
|
|
Type *Ty = VarX->getType();
|
|
unsigned BitWidth = Ty->getScalarSizeInBits();
|
|
if (ShlOp1.uge(BitWidth) || ShrOp1.uge(BitWidth))
|
|
return nullptr; // Undef.
|
|
|
|
unsigned ShlAmt = ShlOp1.getZExtValue();
|
|
unsigned ShrAmt = ShrOp1.getZExtValue();
|
|
|
|
Known.One.clearAllBits();
|
|
Known.Zero.setLowBits(ShlAmt - 1);
|
|
Known.Zero &= DemandedMask;
|
|
|
|
APInt BitMask1(APInt::getAllOnes(BitWidth));
|
|
APInt BitMask2(APInt::getAllOnes(BitWidth));
|
|
|
|
bool isLshr = (Shr->getOpcode() == Instruction::LShr);
|
|
BitMask1 = isLshr ? (BitMask1.lshr(ShrAmt) << ShlAmt) :
|
|
(BitMask1.ashr(ShrAmt) << ShlAmt);
|
|
|
|
if (ShrAmt <= ShlAmt) {
|
|
BitMask2 <<= (ShlAmt - ShrAmt);
|
|
} else {
|
|
BitMask2 = isLshr ? BitMask2.lshr(ShrAmt - ShlAmt):
|
|
BitMask2.ashr(ShrAmt - ShlAmt);
|
|
}
|
|
|
|
// Check if condition-2 (see the comment to this function) is satified.
|
|
if ((BitMask1 & DemandedMask) == (BitMask2 & DemandedMask)) {
|
|
if (ShrAmt == ShlAmt)
|
|
return VarX;
|
|
|
|
if (!Shr->hasOneUse())
|
|
return nullptr;
|
|
|
|
BinaryOperator *New;
|
|
if (ShrAmt < ShlAmt) {
|
|
Constant *Amt = ConstantInt::get(VarX->getType(), ShlAmt - ShrAmt);
|
|
New = BinaryOperator::CreateShl(VarX, Amt);
|
|
BinaryOperator *Orig = cast<BinaryOperator>(Shl);
|
|
New->setHasNoSignedWrap(Orig->hasNoSignedWrap());
|
|
New->setHasNoUnsignedWrap(Orig->hasNoUnsignedWrap());
|
|
} else {
|
|
Constant *Amt = ConstantInt::get(VarX->getType(), ShrAmt - ShlAmt);
|
|
New = isLshr ? BinaryOperator::CreateLShr(VarX, Amt) :
|
|
BinaryOperator::CreateAShr(VarX, Amt);
|
|
if (cast<BinaryOperator>(Shr)->isExact())
|
|
New->setIsExact(true);
|
|
}
|
|
|
|
return InsertNewInstWith(New, *Shl);
|
|
}
|
|
|
|
return nullptr;
|
|
}
|
|
|
|
/// The specified value produces a vector with any number of elements.
|
|
/// This method analyzes which elements of the operand are undef or poison and
|
|
/// returns that information in UndefElts.
|
|
///
|
|
/// DemandedElts contains the set of elements that are actually used by the
|
|
/// caller, and by default (AllowMultipleUsers equals false) the value is
|
|
/// simplified only if it has a single caller. If AllowMultipleUsers is set
|
|
/// to true, DemandedElts refers to the union of sets of elements that are
|
|
/// used by all callers.
|
|
///
|
|
/// If the information about demanded elements can be used to simplify the
|
|
/// operation, the operation is simplified, then the resultant value is
|
|
/// returned. This returns null if no change was made.
|
|
Value *InstCombinerImpl::SimplifyDemandedVectorElts(Value *V,
|
|
APInt DemandedElts,
|
|
APInt &UndefElts,
|
|
unsigned Depth,
|
|
bool AllowMultipleUsers) {
|
|
// Cannot analyze scalable type. The number of vector elements is not a
|
|
// compile-time constant.
|
|
if (isa<ScalableVectorType>(V->getType()))
|
|
return nullptr;
|
|
|
|
unsigned VWidth = cast<FixedVectorType>(V->getType())->getNumElements();
|
|
APInt EltMask(APInt::getAllOnes(VWidth));
|
|
assert((DemandedElts & ~EltMask) == 0 && "Invalid DemandedElts!");
|
|
|
|
if (match(V, m_Undef())) {
|
|
// If the entire vector is undef or poison, just return this info.
|
|
UndefElts = EltMask;
|
|
return nullptr;
|
|
}
|
|
|
|
if (DemandedElts.isZero()) { // If nothing is demanded, provide poison.
|
|
UndefElts = EltMask;
|
|
return PoisonValue::get(V->getType());
|
|
}
|
|
|
|
UndefElts = 0;
|
|
|
|
if (auto *C = dyn_cast<Constant>(V)) {
|
|
// Check if this is identity. If so, return 0 since we are not simplifying
|
|
// anything.
|
|
if (DemandedElts.isAllOnes())
|
|
return nullptr;
|
|
|
|
Type *EltTy = cast<VectorType>(V->getType())->getElementType();
|
|
Constant *Poison = PoisonValue::get(EltTy);
|
|
SmallVector<Constant*, 16> Elts;
|
|
for (unsigned i = 0; i != VWidth; ++i) {
|
|
if (!DemandedElts[i]) { // If not demanded, set to poison.
|
|
Elts.push_back(Poison);
|
|
UndefElts.setBit(i);
|
|
continue;
|
|
}
|
|
|
|
Constant *Elt = C->getAggregateElement(i);
|
|
if (!Elt) return nullptr;
|
|
|
|
Elts.push_back(Elt);
|
|
if (isa<UndefValue>(Elt)) // Already undef or poison.
|
|
UndefElts.setBit(i);
|
|
}
|
|
|
|
// If we changed the constant, return it.
|
|
Constant *NewCV = ConstantVector::get(Elts);
|
|
return NewCV != C ? NewCV : nullptr;
|
|
}
|
|
|
|
// Limit search depth.
|
|
if (Depth == 10)
|
|
return nullptr;
|
|
|
|
if (!AllowMultipleUsers) {
|
|
// If multiple users are using the root value, proceed with
|
|
// simplification conservatively assuming that all elements
|
|
// are needed.
|
|
if (!V->hasOneUse()) {
|
|
// Quit if we find multiple users of a non-root value though.
|
|
// They'll be handled when it's their turn to be visited by
|
|
// the main instcombine process.
|
|
if (Depth != 0)
|
|
// TODO: Just compute the UndefElts information recursively.
|
|
return nullptr;
|
|
|
|
// Conservatively assume that all elements are needed.
|
|
DemandedElts = EltMask;
|
|
}
|
|
}
|
|
|
|
Instruction *I = dyn_cast<Instruction>(V);
|
|
if (!I) return nullptr; // Only analyze instructions.
|
|
|
|
bool MadeChange = false;
|
|
auto simplifyAndSetOp = [&](Instruction *Inst, unsigned OpNum,
|
|
APInt Demanded, APInt &Undef) {
|
|
auto *II = dyn_cast<IntrinsicInst>(Inst);
|
|
Value *Op = II ? II->getArgOperand(OpNum) : Inst->getOperand(OpNum);
|
|
if (Value *V = SimplifyDemandedVectorElts(Op, Demanded, Undef, Depth + 1)) {
|
|
replaceOperand(*Inst, OpNum, V);
|
|
MadeChange = true;
|
|
}
|
|
};
|
|
|
|
APInt UndefElts2(VWidth, 0);
|
|
APInt UndefElts3(VWidth, 0);
|
|
switch (I->getOpcode()) {
|
|
default: break;
|
|
|
|
case Instruction::GetElementPtr: {
|
|
// The LangRef requires that struct geps have all constant indices. As
|
|
// such, we can't convert any operand to partial undef.
|
|
auto mayIndexStructType = [](GetElementPtrInst &GEP) {
|
|
for (auto I = gep_type_begin(GEP), E = gep_type_end(GEP);
|
|
I != E; I++)
|
|
if (I.isStruct())
|
|
return true;
|
|
return false;
|
|
};
|
|
if (mayIndexStructType(cast<GetElementPtrInst>(*I)))
|
|
break;
|
|
|
|
// Conservatively track the demanded elements back through any vector
|
|
// operands we may have. We know there must be at least one, or we
|
|
// wouldn't have a vector result to get here. Note that we intentionally
|
|
// merge the undef bits here since gepping with either an poison base or
|
|
// index results in poison.
|
|
for (unsigned i = 0; i < I->getNumOperands(); i++) {
|
|
if (i == 0 ? match(I->getOperand(i), m_Undef())
|
|
: match(I->getOperand(i), m_Poison())) {
|
|
// If the entire vector is undefined, just return this info.
|
|
UndefElts = EltMask;
|
|
return nullptr;
|
|
}
|
|
if (I->getOperand(i)->getType()->isVectorTy()) {
|
|
APInt UndefEltsOp(VWidth, 0);
|
|
simplifyAndSetOp(I, i, DemandedElts, UndefEltsOp);
|
|
// gep(x, undef) is not undef, so skip considering idx ops here
|
|
// Note that we could propagate poison, but we can't distinguish between
|
|
// undef & poison bits ATM
|
|
if (i == 0)
|
|
UndefElts |= UndefEltsOp;
|
|
}
|
|
}
|
|
|
|
break;
|
|
}
|
|
case Instruction::InsertElement: {
|
|
// If this is a variable index, we don't know which element it overwrites.
|
|
// demand exactly the same input as we produce.
|
|
ConstantInt *Idx = dyn_cast<ConstantInt>(I->getOperand(2));
|
|
if (!Idx) {
|
|
// Note that we can't propagate undef elt info, because we don't know
|
|
// which elt is getting updated.
|
|
simplifyAndSetOp(I, 0, DemandedElts, UndefElts2);
|
|
break;
|
|
}
|
|
|
|
// The element inserted overwrites whatever was there, so the input demanded
|
|
// set is simpler than the output set.
|
|
unsigned IdxNo = Idx->getZExtValue();
|
|
APInt PreInsertDemandedElts = DemandedElts;
|
|
if (IdxNo < VWidth)
|
|
PreInsertDemandedElts.clearBit(IdxNo);
|
|
|
|
// If we only demand the element that is being inserted and that element
|
|
// was extracted from the same index in another vector with the same type,
|
|
// replace this insert with that other vector.
|
|
// Note: This is attempted before the call to simplifyAndSetOp because that
|
|
// may change UndefElts to a value that does not match with Vec.
|
|
Value *Vec;
|
|
if (PreInsertDemandedElts == 0 &&
|
|
match(I->getOperand(1),
|
|
m_ExtractElt(m_Value(Vec), m_SpecificInt(IdxNo))) &&
|
|
Vec->getType() == I->getType()) {
|
|
return Vec;
|
|
}
|
|
|
|
simplifyAndSetOp(I, 0, PreInsertDemandedElts, UndefElts);
|
|
|
|
// If this is inserting an element that isn't demanded, remove this
|
|
// insertelement.
|
|
if (IdxNo >= VWidth || !DemandedElts[IdxNo]) {
|
|
Worklist.push(I);
|
|
return I->getOperand(0);
|
|
}
|
|
|
|
// The inserted element is defined.
|
|
UndefElts.clearBit(IdxNo);
|
|
break;
|
|
}
|
|
case Instruction::ShuffleVector: {
|
|
auto *Shuffle = cast<ShuffleVectorInst>(I);
|
|
assert(Shuffle->getOperand(0)->getType() ==
|
|
Shuffle->getOperand(1)->getType() &&
|
|
"Expected shuffle operands to have same type");
|
|
unsigned OpWidth = cast<FixedVectorType>(Shuffle->getOperand(0)->getType())
|
|
->getNumElements();
|
|
// Handle trivial case of a splat. Only check the first element of LHS
|
|
// operand.
|
|
if (all_of(Shuffle->getShuffleMask(), [](int Elt) { return Elt == 0; }) &&
|
|
DemandedElts.isAllOnes()) {
|
|
if (!match(I->getOperand(1), m_Undef())) {
|
|
I->setOperand(1, PoisonValue::get(I->getOperand(1)->getType()));
|
|
MadeChange = true;
|
|
}
|
|
APInt LeftDemanded(OpWidth, 1);
|
|
APInt LHSUndefElts(OpWidth, 0);
|
|
simplifyAndSetOp(I, 0, LeftDemanded, LHSUndefElts);
|
|
if (LHSUndefElts[0])
|
|
UndefElts = EltMask;
|
|
else
|
|
UndefElts.clearAllBits();
|
|
break;
|
|
}
|
|
|
|
APInt LeftDemanded(OpWidth, 0), RightDemanded(OpWidth, 0);
|
|
for (unsigned i = 0; i < VWidth; i++) {
|
|
if (DemandedElts[i]) {
|
|
unsigned MaskVal = Shuffle->getMaskValue(i);
|
|
if (MaskVal != -1u) {
|
|
assert(MaskVal < OpWidth * 2 &&
|
|
"shufflevector mask index out of range!");
|
|
if (MaskVal < OpWidth)
|
|
LeftDemanded.setBit(MaskVal);
|
|
else
|
|
RightDemanded.setBit(MaskVal - OpWidth);
|
|
}
|
|
}
|
|
}
|
|
|
|
APInt LHSUndefElts(OpWidth, 0);
|
|
simplifyAndSetOp(I, 0, LeftDemanded, LHSUndefElts);
|
|
|
|
APInt RHSUndefElts(OpWidth, 0);
|
|
simplifyAndSetOp(I, 1, RightDemanded, RHSUndefElts);
|
|
|
|
// If this shuffle does not change the vector length and the elements
|
|
// demanded by this shuffle are an identity mask, then this shuffle is
|
|
// unnecessary.
|
|
//
|
|
// We are assuming canonical form for the mask, so the source vector is
|
|
// operand 0 and operand 1 is not used.
|
|
//
|
|
// Note that if an element is demanded and this shuffle mask is undefined
|
|
// for that element, then the shuffle is not considered an identity
|
|
// operation. The shuffle prevents poison from the operand vector from
|
|
// leaking to the result by replacing poison with an undefined value.
|
|
if (VWidth == OpWidth) {
|
|
bool IsIdentityShuffle = true;
|
|
for (unsigned i = 0; i < VWidth; i++) {
|
|
unsigned MaskVal = Shuffle->getMaskValue(i);
|
|
if (DemandedElts[i] && i != MaskVal) {
|
|
IsIdentityShuffle = false;
|
|
break;
|
|
}
|
|
}
|
|
if (IsIdentityShuffle)
|
|
return Shuffle->getOperand(0);
|
|
}
|
|
|
|
bool NewUndefElts = false;
|
|
unsigned LHSIdx = -1u, LHSValIdx = -1u;
|
|
unsigned RHSIdx = -1u, RHSValIdx = -1u;
|
|
bool LHSUniform = true;
|
|
bool RHSUniform = true;
|
|
for (unsigned i = 0; i < VWidth; i++) {
|
|
unsigned MaskVal = Shuffle->getMaskValue(i);
|
|
if (MaskVal == -1u) {
|
|
UndefElts.setBit(i);
|
|
} else if (!DemandedElts[i]) {
|
|
NewUndefElts = true;
|
|
UndefElts.setBit(i);
|
|
} else if (MaskVal < OpWidth) {
|
|
if (LHSUndefElts[MaskVal]) {
|
|
NewUndefElts = true;
|
|
UndefElts.setBit(i);
|
|
} else {
|
|
LHSIdx = LHSIdx == -1u ? i : OpWidth;
|
|
LHSValIdx = LHSValIdx == -1u ? MaskVal : OpWidth;
|
|
LHSUniform = LHSUniform && (MaskVal == i);
|
|
}
|
|
} else {
|
|
if (RHSUndefElts[MaskVal - OpWidth]) {
|
|
NewUndefElts = true;
|
|
UndefElts.setBit(i);
|
|
} else {
|
|
RHSIdx = RHSIdx == -1u ? i : OpWidth;
|
|
RHSValIdx = RHSValIdx == -1u ? MaskVal - OpWidth : OpWidth;
|
|
RHSUniform = RHSUniform && (MaskVal - OpWidth == i);
|
|
}
|
|
}
|
|
}
|
|
|
|
// Try to transform shuffle with constant vector and single element from
|
|
// this constant vector to single insertelement instruction.
|
|
// shufflevector V, C, <v1, v2, .., ci, .., vm> ->
|
|
// insertelement V, C[ci], ci-n
|
|
if (OpWidth ==
|
|
cast<FixedVectorType>(Shuffle->getType())->getNumElements()) {
|
|
Value *Op = nullptr;
|
|
Constant *Value = nullptr;
|
|
unsigned Idx = -1u;
|
|
|
|
// Find constant vector with the single element in shuffle (LHS or RHS).
|
|
if (LHSIdx < OpWidth && RHSUniform) {
|
|
if (auto *CV = dyn_cast<ConstantVector>(Shuffle->getOperand(0))) {
|
|
Op = Shuffle->getOperand(1);
|
|
Value = CV->getOperand(LHSValIdx);
|
|
Idx = LHSIdx;
|
|
}
|
|
}
|
|
if (RHSIdx < OpWidth && LHSUniform) {
|
|
if (auto *CV = dyn_cast<ConstantVector>(Shuffle->getOperand(1))) {
|
|
Op = Shuffle->getOperand(0);
|
|
Value = CV->getOperand(RHSValIdx);
|
|
Idx = RHSIdx;
|
|
}
|
|
}
|
|
// Found constant vector with single element - convert to insertelement.
|
|
if (Op && Value) {
|
|
Instruction *New = InsertElementInst::Create(
|
|
Op, Value, ConstantInt::get(Type::getInt32Ty(I->getContext()), Idx),
|
|
Shuffle->getName());
|
|
InsertNewInstWith(New, *Shuffle);
|
|
return New;
|
|
}
|
|
}
|
|
if (NewUndefElts) {
|
|
// Add additional discovered undefs.
|
|
SmallVector<int, 16> Elts;
|
|
for (unsigned i = 0; i < VWidth; ++i) {
|
|
if (UndefElts[i])
|
|
Elts.push_back(UndefMaskElem);
|
|
else
|
|
Elts.push_back(Shuffle->getMaskValue(i));
|
|
}
|
|
Shuffle->setShuffleMask(Elts);
|
|
MadeChange = true;
|
|
}
|
|
break;
|
|
}
|
|
case Instruction::Select: {
|
|
// If this is a vector select, try to transform the select condition based
|
|
// on the current demanded elements.
|
|
SelectInst *Sel = cast<SelectInst>(I);
|
|
if (Sel->getCondition()->getType()->isVectorTy()) {
|
|
// TODO: We are not doing anything with UndefElts based on this call.
|
|
// It is overwritten below based on the other select operands. If an
|
|
// element of the select condition is known undef, then we are free to
|
|
// choose the output value from either arm of the select. If we know that
|
|
// one of those values is undef, then the output can be undef.
|
|
simplifyAndSetOp(I, 0, DemandedElts, UndefElts);
|
|
}
|
|
|
|
// Next, see if we can transform the arms of the select.
|
|
APInt DemandedLHS(DemandedElts), DemandedRHS(DemandedElts);
|
|
if (auto *CV = dyn_cast<ConstantVector>(Sel->getCondition())) {
|
|
for (unsigned i = 0; i < VWidth; i++) {
|
|
// isNullValue() always returns false when called on a ConstantExpr.
|
|
// Skip constant expressions to avoid propagating incorrect information.
|
|
Constant *CElt = CV->getAggregateElement(i);
|
|
if (isa<ConstantExpr>(CElt))
|
|
continue;
|
|
// TODO: If a select condition element is undef, we can demand from
|
|
// either side. If one side is known undef, choosing that side would
|
|
// propagate undef.
|
|
if (CElt->isNullValue())
|
|
DemandedLHS.clearBit(i);
|
|
else
|
|
DemandedRHS.clearBit(i);
|
|
}
|
|
}
|
|
|
|
simplifyAndSetOp(I, 1, DemandedLHS, UndefElts2);
|
|
simplifyAndSetOp(I, 2, DemandedRHS, UndefElts3);
|
|
|
|
// Output elements are undefined if the element from each arm is undefined.
|
|
// TODO: This can be improved. See comment in select condition handling.
|
|
UndefElts = UndefElts2 & UndefElts3;
|
|
break;
|
|
}
|
|
case Instruction::BitCast: {
|
|
// Vector->vector casts only.
|
|
VectorType *VTy = dyn_cast<VectorType>(I->getOperand(0)->getType());
|
|
if (!VTy) break;
|
|
unsigned InVWidth = cast<FixedVectorType>(VTy)->getNumElements();
|
|
APInt InputDemandedElts(InVWidth, 0);
|
|
UndefElts2 = APInt(InVWidth, 0);
|
|
unsigned Ratio;
|
|
|
|
if (VWidth == InVWidth) {
|
|
// If we are converting from <4 x i32> -> <4 x f32>, we demand the same
|
|
// elements as are demanded of us.
|
|
Ratio = 1;
|
|
InputDemandedElts = DemandedElts;
|
|
} else if ((VWidth % InVWidth) == 0) {
|
|
// If the number of elements in the output is a multiple of the number of
|
|
// elements in the input then an input element is live if any of the
|
|
// corresponding output elements are live.
|
|
Ratio = VWidth / InVWidth;
|
|
for (unsigned OutIdx = 0; OutIdx != VWidth; ++OutIdx)
|
|
if (DemandedElts[OutIdx])
|
|
InputDemandedElts.setBit(OutIdx / Ratio);
|
|
} else if ((InVWidth % VWidth) == 0) {
|
|
// If the number of elements in the input is a multiple of the number of
|
|
// elements in the output then an input element is live if the
|
|
// corresponding output element is live.
|
|
Ratio = InVWidth / VWidth;
|
|
for (unsigned InIdx = 0; InIdx != InVWidth; ++InIdx)
|
|
if (DemandedElts[InIdx / Ratio])
|
|
InputDemandedElts.setBit(InIdx);
|
|
} else {
|
|
// Unsupported so far.
|
|
break;
|
|
}
|
|
|
|
simplifyAndSetOp(I, 0, InputDemandedElts, UndefElts2);
|
|
|
|
if (VWidth == InVWidth) {
|
|
UndefElts = UndefElts2;
|
|
} else if ((VWidth % InVWidth) == 0) {
|
|
// If the number of elements in the output is a multiple of the number of
|
|
// elements in the input then an output element is undef if the
|
|
// corresponding input element is undef.
|
|
for (unsigned OutIdx = 0; OutIdx != VWidth; ++OutIdx)
|
|
if (UndefElts2[OutIdx / Ratio])
|
|
UndefElts.setBit(OutIdx);
|
|
} else if ((InVWidth % VWidth) == 0) {
|
|
// If the number of elements in the input is a multiple of the number of
|
|
// elements in the output then an output element is undef if all of the
|
|
// corresponding input elements are undef.
|
|
for (unsigned OutIdx = 0; OutIdx != VWidth; ++OutIdx) {
|
|
APInt SubUndef = UndefElts2.lshr(OutIdx * Ratio).zextOrTrunc(Ratio);
|
|
if (SubUndef.popcount() == Ratio)
|
|
UndefElts.setBit(OutIdx);
|
|
}
|
|
} else {
|
|
llvm_unreachable("Unimp");
|
|
}
|
|
break;
|
|
}
|
|
case Instruction::FPTrunc:
|
|
case Instruction::FPExt:
|
|
simplifyAndSetOp(I, 0, DemandedElts, UndefElts);
|
|
break;
|
|
|
|
case Instruction::Call: {
|
|
IntrinsicInst *II = dyn_cast<IntrinsicInst>(I);
|
|
if (!II) break;
|
|
switch (II->getIntrinsicID()) {
|
|
case Intrinsic::masked_gather: // fallthrough
|
|
case Intrinsic::masked_load: {
|
|
// Subtlety: If we load from a pointer, the pointer must be valid
|
|
// regardless of whether the element is demanded. Doing otherwise risks
|
|
// segfaults which didn't exist in the original program.
|
|
APInt DemandedPtrs(APInt::getAllOnes(VWidth)),
|
|
DemandedPassThrough(DemandedElts);
|
|
if (auto *CV = dyn_cast<ConstantVector>(II->getOperand(2)))
|
|
for (unsigned i = 0; i < VWidth; i++) {
|
|
Constant *CElt = CV->getAggregateElement(i);
|
|
if (CElt->isNullValue())
|
|
DemandedPtrs.clearBit(i);
|
|
else if (CElt->isAllOnesValue())
|
|
DemandedPassThrough.clearBit(i);
|
|
}
|
|
if (II->getIntrinsicID() == Intrinsic::masked_gather)
|
|
simplifyAndSetOp(II, 0, DemandedPtrs, UndefElts2);
|
|
simplifyAndSetOp(II, 3, DemandedPassThrough, UndefElts3);
|
|
|
|
// Output elements are undefined if the element from both sources are.
|
|
// TODO: can strengthen via mask as well.
|
|
UndefElts = UndefElts2 & UndefElts3;
|
|
break;
|
|
}
|
|
default: {
|
|
// Handle target specific intrinsics
|
|
std::optional<Value *> V = targetSimplifyDemandedVectorEltsIntrinsic(
|
|
*II, DemandedElts, UndefElts, UndefElts2, UndefElts3,
|
|
simplifyAndSetOp);
|
|
if (V)
|
|
return *V;
|
|
break;
|
|
}
|
|
} // switch on IntrinsicID
|
|
break;
|
|
} // case Call
|
|
} // switch on Opcode
|
|
|
|
// TODO: We bail completely on integer div/rem and shifts because they have
|
|
// UB/poison potential, but that should be refined.
|
|
BinaryOperator *BO;
|
|
if (match(I, m_BinOp(BO)) && !BO->isIntDivRem() && !BO->isShift()) {
|
|
Value *X = BO->getOperand(0);
|
|
Value *Y = BO->getOperand(1);
|
|
|
|
// Look for an equivalent binop except that one operand has been shuffled.
|
|
// If the demand for this binop only includes elements that are the same as
|
|
// the other binop, then we may be able to replace this binop with a use of
|
|
// the earlier one.
|
|
//
|
|
// Example:
|
|
// %other_bo = bo (shuf X, {0}), Y
|
|
// %this_extracted_bo = extelt (bo X, Y), 0
|
|
// -->
|
|
// %other_bo = bo (shuf X, {0}), Y
|
|
// %this_extracted_bo = extelt %other_bo, 0
|
|
//
|
|
// TODO: Handle demand of an arbitrary single element or more than one
|
|
// element instead of just element 0.
|
|
// TODO: Unlike general demanded elements transforms, this should be safe
|
|
// for any (div/rem/shift) opcode too.
|
|
if (DemandedElts == 1 && !X->hasOneUse() && !Y->hasOneUse() &&
|
|
BO->hasOneUse() ) {
|
|
|
|
auto findShufBO = [&](bool MatchShufAsOp0) -> User * {
|
|
// Try to use shuffle-of-operand in place of an operand:
|
|
// bo X, Y --> bo (shuf X), Y
|
|
// bo X, Y --> bo X, (shuf Y)
|
|
BinaryOperator::BinaryOps Opcode = BO->getOpcode();
|
|
Value *ShufOp = MatchShufAsOp0 ? X : Y;
|
|
Value *OtherOp = MatchShufAsOp0 ? Y : X;
|
|
for (User *U : OtherOp->users()) {
|
|
auto Shuf = m_Shuffle(m_Specific(ShufOp), m_Value(), m_ZeroMask());
|
|
if (BO->isCommutative()
|
|
? match(U, m_c_BinOp(Opcode, Shuf, m_Specific(OtherOp)))
|
|
: MatchShufAsOp0
|
|
? match(U, m_BinOp(Opcode, Shuf, m_Specific(OtherOp)))
|
|
: match(U, m_BinOp(Opcode, m_Specific(OtherOp), Shuf)))
|
|
if (DT.dominates(U, I))
|
|
return U;
|
|
}
|
|
return nullptr;
|
|
};
|
|
|
|
if (User *ShufBO = findShufBO(/* MatchShufAsOp0 */ true))
|
|
return ShufBO;
|
|
if (User *ShufBO = findShufBO(/* MatchShufAsOp0 */ false))
|
|
return ShufBO;
|
|
}
|
|
|
|
simplifyAndSetOp(I, 0, DemandedElts, UndefElts);
|
|
simplifyAndSetOp(I, 1, DemandedElts, UndefElts2);
|
|
|
|
// Output elements are undefined if both are undefined. Consider things
|
|
// like undef & 0. The result is known zero, not undef.
|
|
UndefElts &= UndefElts2;
|
|
}
|
|
|
|
// If we've proven all of the lanes undef, return an undef value.
|
|
// TODO: Intersect w/demanded lanes
|
|
if (UndefElts.isAllOnes())
|
|
return UndefValue::get(I->getType());;
|
|
|
|
return MadeChange ? I : nullptr;
|
|
}
|