40 lines
1.2 KiB
ArmAsm
40 lines
1.2 KiB
ArmAsm
/* SPDX-License-Identifier: GPL-2.0-or-later */
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/*
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* Shared glue code for 128bit block ciphers, AVX2 assembler macros
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*
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* Copyright © 2012-2013 Jussi Kivilinna <jussi.kivilinna@mbnet.fi>
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*/
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#define load_16way(src, x0, x1, x2, x3, x4, x5, x6, x7) \
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vmovdqu (0*32)(src), x0; \
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vmovdqu (1*32)(src), x1; \
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vmovdqu (2*32)(src), x2; \
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vmovdqu (3*32)(src), x3; \
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vmovdqu (4*32)(src), x4; \
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vmovdqu (5*32)(src), x5; \
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vmovdqu (6*32)(src), x6; \
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vmovdqu (7*32)(src), x7;
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#define store_16way(dst, x0, x1, x2, x3, x4, x5, x6, x7) \
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vmovdqu x0, (0*32)(dst); \
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vmovdqu x1, (1*32)(dst); \
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vmovdqu x2, (2*32)(dst); \
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vmovdqu x3, (3*32)(dst); \
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vmovdqu x4, (4*32)(dst); \
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vmovdqu x5, (5*32)(dst); \
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vmovdqu x6, (6*32)(dst); \
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vmovdqu x7, (7*32)(dst);
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#define store_cbc_16way(src, dst, x0, x1, x2, x3, x4, x5, x6, x7, t0) \
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vpxor t0, t0, t0; \
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vinserti128 $1, (src), t0, t0; \
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vpxor t0, x0, x0; \
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vpxor (0*32+16)(src), x1, x1; \
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vpxor (1*32+16)(src), x2, x2; \
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vpxor (2*32+16)(src), x3, x3; \
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vpxor (3*32+16)(src), x4, x4; \
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vpxor (4*32+16)(src), x5, x5; \
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vpxor (5*32+16)(src), x6, x6; \
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vpxor (6*32+16)(src), x7, x7; \
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store_16way(dst, x0, x1, x2, x3, x4, x5, x6, x7);
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