2005-04-17 06:20:36 +08:00
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/*
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* Copyright (C) 1999 Cort Dougan <cort@cs.nmt.edu>
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*/
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2005-09-22 05:52:55 +08:00
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#ifndef _ASM_POWERPC_HW_IRQ_H
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#define _ASM_POWERPC_HW_IRQ_H
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2005-04-17 06:20:36 +08:00
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#ifdef __KERNEL__
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#include <linux/errno.h>
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[POWERPC] Lazy interrupt disabling for 64-bit machines
This implements a lazy strategy for disabling interrupts. This means
that local_irq_disable() et al. just clear the 'interrupts are
enabled' flag in the paca. If an interrupt comes along, the interrupt
entry code notices that interrupts are supposed to be disabled, and
clears the EE bit in SRR1, clears the 'interrupts are hard-enabled'
flag in the paca, and returns. This means that interrupts only
actually get disabled in the processor when an interrupt comes along.
When interrupts are enabled by local_irq_enable() et al., the code
sets the interrupts-enabled flag in the paca, and then checks whether
interrupts got hard-disabled. If so, it also sets the EE bit in the
MSR to hard-enable the interrupts.
This has the potential to improve performance, and also makes it
easier to make a kernel that can boot on iSeries and on other 64-bit
machines, since this lazy-disable strategy is very similar to the
soft-disable strategy that iSeries already uses.
This version renames paca->proc_enabled to paca->soft_enabled, and
changes a couple of soft-disables in the kexec code to hard-disables,
which should fix the crash that Michael Ellerman saw. This doesn't
yet use a reserved CR field for the soft_enabled and hard_enabled
flags. This applies on top of Stephen Rothwell's patches to make it
possible to build a combined iSeries/other kernel.
Signed-off-by: Paul Mackerras <paulus@samba.org>
2006-10-04 14:47:49 +08:00
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#include <linux/compiler.h>
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2005-09-22 05:52:55 +08:00
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#include <asm/ptrace.h>
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#include <asm/processor.h>
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2005-04-17 06:20:36 +08:00
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2005-09-19 22:30:27 +08:00
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extern void timer_interrupt(struct pt_regs *);
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2005-04-17 06:20:36 +08:00
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[POWERPC] Lazy interrupt disabling for 64-bit machines
This implements a lazy strategy for disabling interrupts. This means
that local_irq_disable() et al. just clear the 'interrupts are
enabled' flag in the paca. If an interrupt comes along, the interrupt
entry code notices that interrupts are supposed to be disabled, and
clears the EE bit in SRR1, clears the 'interrupts are hard-enabled'
flag in the paca, and returns. This means that interrupts only
actually get disabled in the processor when an interrupt comes along.
When interrupts are enabled by local_irq_enable() et al., the code
sets the interrupts-enabled flag in the paca, and then checks whether
interrupts got hard-disabled. If so, it also sets the EE bit in the
MSR to hard-enable the interrupts.
This has the potential to improve performance, and also makes it
easier to make a kernel that can boot on iSeries and on other 64-bit
machines, since this lazy-disable strategy is very similar to the
soft-disable strategy that iSeries already uses.
This version renames paca->proc_enabled to paca->soft_enabled, and
changes a couple of soft-disables in the kexec code to hard-disables,
which should fix the crash that Michael Ellerman saw. This doesn't
yet use a reserved CR field for the soft_enabled and hard_enabled
flags. This applies on top of Stephen Rothwell's patches to make it
possible to build a combined iSeries/other kernel.
Signed-off-by: Paul Mackerras <paulus@samba.org>
2006-10-04 14:47:49 +08:00
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#ifdef CONFIG_PPC64
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#include <asm/paca.h>
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2010-10-07 21:08:55 +08:00
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static inline unsigned long arch_local_save_flags(void)
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[POWERPC] Lazy interrupt disabling for 64-bit machines
This implements a lazy strategy for disabling interrupts. This means
that local_irq_disable() et al. just clear the 'interrupts are
enabled' flag in the paca. If an interrupt comes along, the interrupt
entry code notices that interrupts are supposed to be disabled, and
clears the EE bit in SRR1, clears the 'interrupts are hard-enabled'
flag in the paca, and returns. This means that interrupts only
actually get disabled in the processor when an interrupt comes along.
When interrupts are enabled by local_irq_enable() et al., the code
sets the interrupts-enabled flag in the paca, and then checks whether
interrupts got hard-disabled. If so, it also sets the EE bit in the
MSR to hard-enable the interrupts.
This has the potential to improve performance, and also makes it
easier to make a kernel that can boot on iSeries and on other 64-bit
machines, since this lazy-disable strategy is very similar to the
soft-disable strategy that iSeries already uses.
This version renames paca->proc_enabled to paca->soft_enabled, and
changes a couple of soft-disables in the kexec code to hard-disables,
which should fix the crash that Michael Ellerman saw. This doesn't
yet use a reserved CR field for the soft_enabled and hard_enabled
flags. This applies on top of Stephen Rothwell's patches to make it
possible to build a combined iSeries/other kernel.
Signed-off-by: Paul Mackerras <paulus@samba.org>
2006-10-04 14:47:49 +08:00
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{
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2006-11-11 05:32:40 +08:00
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unsigned long flags;
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2010-10-07 21:08:55 +08:00
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asm volatile(
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"lbz %0,%1(13)"
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: "=r" (flags)
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: "i" (offsetof(struct paca_struct, soft_enabled)));
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2006-11-11 05:32:40 +08:00
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return flags;
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[POWERPC] Lazy interrupt disabling for 64-bit machines
This implements a lazy strategy for disabling interrupts. This means
that local_irq_disable() et al. just clear the 'interrupts are
enabled' flag in the paca. If an interrupt comes along, the interrupt
entry code notices that interrupts are supposed to be disabled, and
clears the EE bit in SRR1, clears the 'interrupts are hard-enabled'
flag in the paca, and returns. This means that interrupts only
actually get disabled in the processor when an interrupt comes along.
When interrupts are enabled by local_irq_enable() et al., the code
sets the interrupts-enabled flag in the paca, and then checks whether
interrupts got hard-disabled. If so, it also sets the EE bit in the
MSR to hard-enable the interrupts.
This has the potential to improve performance, and also makes it
easier to make a kernel that can boot on iSeries and on other 64-bit
machines, since this lazy-disable strategy is very similar to the
soft-disable strategy that iSeries already uses.
This version renames paca->proc_enabled to paca->soft_enabled, and
changes a couple of soft-disables in the kexec code to hard-disables,
which should fix the crash that Michael Ellerman saw. This doesn't
yet use a reserved CR field for the soft_enabled and hard_enabled
flags. This applies on top of Stephen Rothwell's patches to make it
possible to build a combined iSeries/other kernel.
Signed-off-by: Paul Mackerras <paulus@samba.org>
2006-10-04 14:47:49 +08:00
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}
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2010-10-07 21:08:55 +08:00
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static inline unsigned long arch_local_irq_disable(void)
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[POWERPC] Lazy interrupt disabling for 64-bit machines
This implements a lazy strategy for disabling interrupts. This means
that local_irq_disable() et al. just clear the 'interrupts are
enabled' flag in the paca. If an interrupt comes along, the interrupt
entry code notices that interrupts are supposed to be disabled, and
clears the EE bit in SRR1, clears the 'interrupts are hard-enabled'
flag in the paca, and returns. This means that interrupts only
actually get disabled in the processor when an interrupt comes along.
When interrupts are enabled by local_irq_enable() et al., the code
sets the interrupts-enabled flag in the paca, and then checks whether
interrupts got hard-disabled. If so, it also sets the EE bit in the
MSR to hard-enable the interrupts.
This has the potential to improve performance, and also makes it
easier to make a kernel that can boot on iSeries and on other 64-bit
machines, since this lazy-disable strategy is very similar to the
soft-disable strategy that iSeries already uses.
This version renames paca->proc_enabled to paca->soft_enabled, and
changes a couple of soft-disables in the kexec code to hard-disables,
which should fix the crash that Michael Ellerman saw. This doesn't
yet use a reserved CR field for the soft_enabled and hard_enabled
flags. This applies on top of Stephen Rothwell's patches to make it
possible to build a combined iSeries/other kernel.
Signed-off-by: Paul Mackerras <paulus@samba.org>
2006-10-04 14:47:49 +08:00
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{
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2006-11-11 05:32:40 +08:00
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unsigned long flags, zero;
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2010-10-07 21:08:55 +08:00
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asm volatile(
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"li %1,0; lbz %0,%2(13); stb %1,%2(13)"
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: "=r" (flags), "=&r" (zero)
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: "i" (offsetof(struct paca_struct, soft_enabled))
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: "memory");
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2006-11-11 05:32:40 +08:00
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return flags;
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[POWERPC] Lazy interrupt disabling for 64-bit machines
This implements a lazy strategy for disabling interrupts. This means
that local_irq_disable() et al. just clear the 'interrupts are
enabled' flag in the paca. If an interrupt comes along, the interrupt
entry code notices that interrupts are supposed to be disabled, and
clears the EE bit in SRR1, clears the 'interrupts are hard-enabled'
flag in the paca, and returns. This means that interrupts only
actually get disabled in the processor when an interrupt comes along.
When interrupts are enabled by local_irq_enable() et al., the code
sets the interrupts-enabled flag in the paca, and then checks whether
interrupts got hard-disabled. If so, it also sets the EE bit in the
MSR to hard-enable the interrupts.
This has the potential to improve performance, and also makes it
easier to make a kernel that can boot on iSeries and on other 64-bit
machines, since this lazy-disable strategy is very similar to the
soft-disable strategy that iSeries already uses.
This version renames paca->proc_enabled to paca->soft_enabled, and
changes a couple of soft-disables in the kexec code to hard-disables,
which should fix the crash that Michael Ellerman saw. This doesn't
yet use a reserved CR field for the soft_enabled and hard_enabled
flags. This applies on top of Stephen Rothwell's patches to make it
possible to build a combined iSeries/other kernel.
Signed-off-by: Paul Mackerras <paulus@samba.org>
2006-10-04 14:47:49 +08:00
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}
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2005-04-17 06:20:36 +08:00
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2010-10-07 21:08:55 +08:00
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extern void arch_local_irq_restore(unsigned long);
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[POWERPC] Lazy interrupt disabling for 64-bit machines
This implements a lazy strategy for disabling interrupts. This means
that local_irq_disable() et al. just clear the 'interrupts are
enabled' flag in the paca. If an interrupt comes along, the interrupt
entry code notices that interrupts are supposed to be disabled, and
clears the EE bit in SRR1, clears the 'interrupts are hard-enabled'
flag in the paca, and returns. This means that interrupts only
actually get disabled in the processor when an interrupt comes along.
When interrupts are enabled by local_irq_enable() et al., the code
sets the interrupts-enabled flag in the paca, and then checks whether
interrupts got hard-disabled. If so, it also sets the EE bit in the
MSR to hard-enable the interrupts.
This has the potential to improve performance, and also makes it
easier to make a kernel that can boot on iSeries and on other 64-bit
machines, since this lazy-disable strategy is very similar to the
soft-disable strategy that iSeries already uses.
This version renames paca->proc_enabled to paca->soft_enabled, and
changes a couple of soft-disables in the kexec code to hard-disables,
which should fix the crash that Michael Ellerman saw. This doesn't
yet use a reserved CR field for the soft_enabled and hard_enabled
flags. This applies on top of Stephen Rothwell's patches to make it
possible to build a combined iSeries/other kernel.
Signed-off-by: Paul Mackerras <paulus@samba.org>
2006-10-04 14:47:49 +08:00
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extern void iseries_handle_interrupts(void);
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2005-04-17 06:20:36 +08:00
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2010-10-07 21:08:55 +08:00
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static inline void arch_local_irq_enable(void)
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{
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arch_local_irq_restore(1);
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}
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static inline unsigned long arch_local_irq_save(void)
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{
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return arch_local_irq_disable();
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}
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static inline bool arch_irqs_disabled_flags(unsigned long flags)
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{
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return flags == 0;
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}
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2005-04-17 06:20:36 +08:00
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2010-10-07 21:08:55 +08:00
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static inline bool arch_irqs_disabled(void)
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{
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return arch_irqs_disabled_flags(arch_local_save_flags());
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}
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2005-04-17 06:20:36 +08:00
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2009-07-24 07:15:59 +08:00
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#ifdef CONFIG_PPC_BOOK3E
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2010-10-07 21:08:55 +08:00
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#define __hard_irq_enable() asm volatile("wrteei 1" : : : "memory");
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#define __hard_irq_disable() asm volatile("wrteei 0" : : : "memory");
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2009-07-24 07:15:59 +08:00
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#else
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2007-05-11 13:22:45 +08:00
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#define __hard_irq_enable() __mtmsrd(mfmsr() | MSR_EE, 1)
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#define __hard_irq_disable() __mtmsrd(mfmsr() & ~MSR_EE, 1)
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2009-07-24 07:15:59 +08:00
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#endif
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2007-05-11 13:22:45 +08:00
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#define hard_irq_disable() \
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do { \
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__hard_irq_disable(); \
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get_paca()->soft_enabled = 0; \
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get_paca()->hard_enabled = 0; \
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} while(0)
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[POWERPC] Lazy interrupt disabling for 64-bit machines
This implements a lazy strategy for disabling interrupts. This means
that local_irq_disable() et al. just clear the 'interrupts are
enabled' flag in the paca. If an interrupt comes along, the interrupt
entry code notices that interrupts are supposed to be disabled, and
clears the EE bit in SRR1, clears the 'interrupts are hard-enabled'
flag in the paca, and returns. This means that interrupts only
actually get disabled in the processor when an interrupt comes along.
When interrupts are enabled by local_irq_enable() et al., the code
sets the interrupts-enabled flag in the paca, and then checks whether
interrupts got hard-disabled. If so, it also sets the EE bit in the
MSR to hard-enable the interrupts.
This has the potential to improve performance, and also makes it
easier to make a kernel that can boot on iSeries and on other 64-bit
machines, since this lazy-disable strategy is very similar to the
soft-disable strategy that iSeries already uses.
This version renames paca->proc_enabled to paca->soft_enabled, and
changes a couple of soft-disables in the kexec code to hard-disables,
which should fix the crash that Michael Ellerman saw. This doesn't
yet use a reserved CR field for the soft_enabled and hard_enabled
flags. This applies on top of Stephen Rothwell's patches to make it
possible to build a combined iSeries/other kernel.
Signed-off-by: Paul Mackerras <paulus@samba.org>
2006-10-04 14:47:49 +08:00
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2010-10-07 21:08:55 +08:00
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#else /* CONFIG_PPC64 */
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2005-04-17 06:20:36 +08:00
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2005-09-22 05:52:55 +08:00
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#define SET_MSR_EE(x) mtmsr(x)
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2010-10-07 21:08:55 +08:00
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static inline unsigned long arch_local_save_flags(void)
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{
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return mfmsr();
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}
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static inline void arch_local_irq_restore(unsigned long flags)
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{
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#if defined(CONFIG_BOOKE)
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asm volatile("wrtee %0" : : "r" (flags) : "memory");
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2005-09-22 05:52:55 +08:00
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#else
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2010-10-07 21:08:55 +08:00
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mtmsr(flags);
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2005-09-22 05:52:55 +08:00
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#endif
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2010-10-07 21:08:55 +08:00
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}
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2005-04-17 06:20:36 +08:00
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2010-10-07 21:08:55 +08:00
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static inline unsigned long arch_local_irq_save(void)
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2005-04-17 06:20:36 +08:00
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{
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2010-10-07 21:08:55 +08:00
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unsigned long flags = arch_local_save_flags();
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2005-09-22 05:52:55 +08:00
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#ifdef CONFIG_BOOKE
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2010-10-07 21:08:55 +08:00
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asm volatile("wrteei 0" : : : "memory");
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2005-09-22 05:52:55 +08:00
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#else
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2010-10-07 21:08:55 +08:00
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SET_MSR_EE(flags & ~MSR_EE);
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2005-09-22 05:52:55 +08:00
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#endif
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2010-10-07 21:08:55 +08:00
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return flags;
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2005-04-17 06:20:36 +08:00
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}
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2010-10-07 21:08:55 +08:00
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static inline void arch_local_irq_disable(void)
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2005-04-17 06:20:36 +08:00
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{
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2005-09-22 05:52:55 +08:00
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#ifdef CONFIG_BOOKE
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2010-10-07 21:08:55 +08:00
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asm volatile("wrteei 0" : : : "memory");
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2005-09-22 05:52:55 +08:00
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#else
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2010-10-07 21:08:55 +08:00
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arch_local_irq_save();
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2005-09-22 05:52:55 +08:00
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#endif
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2005-04-17 06:20:36 +08:00
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}
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2010-10-07 21:08:55 +08:00
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static inline void arch_local_irq_enable(void)
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2005-04-17 06:20:36 +08:00
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{
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2005-09-22 05:52:55 +08:00
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#ifdef CONFIG_BOOKE
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2010-10-07 21:08:55 +08:00
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asm volatile("wrteei 1" : : : "memory");
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2005-09-22 05:52:55 +08:00
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#else
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2010-10-07 21:08:55 +08:00
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unsigned long msr = mfmsr();
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SET_MSR_EE(msr | MSR_EE);
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2005-09-22 05:52:55 +08:00
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#endif
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2005-04-17 06:20:36 +08:00
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}
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2010-10-07 21:08:55 +08:00
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static inline bool arch_irqs_disabled_flags(unsigned long flags)
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2008-05-15 11:49:43 +08:00
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{
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return (flags & MSR_EE) == 0;
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}
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2010-10-07 21:08:55 +08:00
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static inline bool arch_irqs_disabled(void)
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{
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return arch_irqs_disabled_flags(arch_local_save_flags());
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}
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#define hard_irq_disable() arch_local_irq_disable()
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[POWERPC] Lazy interrupt disabling for 64-bit machines
This implements a lazy strategy for disabling interrupts. This means
that local_irq_disable() et al. just clear the 'interrupts are
enabled' flag in the paca. If an interrupt comes along, the interrupt
entry code notices that interrupts are supposed to be disabled, and
clears the EE bit in SRR1, clears the 'interrupts are hard-enabled'
flag in the paca, and returns. This means that interrupts only
actually get disabled in the processor when an interrupt comes along.
When interrupts are enabled by local_irq_enable() et al., the code
sets the interrupts-enabled flag in the paca, and then checks whether
interrupts got hard-disabled. If so, it also sets the EE bit in the
MSR to hard-enable the interrupts.
This has the potential to improve performance, and also makes it
easier to make a kernel that can boot on iSeries and on other 64-bit
machines, since this lazy-disable strategy is very similar to the
soft-disable strategy that iSeries already uses.
This version renames paca->proc_enabled to paca->soft_enabled, and
changes a couple of soft-disables in the kexec code to hard-disables,
which should fix the crash that Michael Ellerman saw. This doesn't
yet use a reserved CR field for the soft_enabled and hard_enabled
flags. This applies on top of Stephen Rothwell's patches to make it
possible to build a combined iSeries/other kernel.
Signed-off-by: Paul Mackerras <paulus@samba.org>
2006-10-04 14:47:49 +08:00
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#endif /* CONFIG_PPC64 */
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2005-04-17 06:20:36 +08:00
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2006-06-29 17:24:44 +08:00
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/*
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* interrupt-retrigger: should we handle this via lost interrupts and IPIs
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* or should we not care like we do now ? --BenH.
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2005-04-17 06:20:36 +08:00
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*/
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2009-03-10 22:46:30 +08:00
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struct irq_chip;
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2005-09-22 05:52:55 +08:00
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#endif /* __KERNEL__ */
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#endif /* _ASM_POWERPC_HW_IRQ_H */
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