plat-orion: share IRQ handling code
Split off Orion IRQ handling code into plat-orion/, and add support for multiple sets of (32) interrupts. Signed-off-by: Lennert Buytenhek <buytenh@marvell.com> Reviewed-by: Tzachi Perelstein <tzachi@marvell.com> Acked-by: Russell King <rmk+kernel@arm.linux.org.uk> Signed-off-by: Nicolas Pitre <nico@marvell.com>
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@ -15,6 +15,7 @@
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#include <linux/irq.h>
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#include <asm/gpio.h>
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#include <asm/arch/orion.h>
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#include <asm/plat-orion/irq.h>
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#include "common.h"
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/*****************************************************************************
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@ -197,41 +198,9 @@ static void __init orion_init_gpio_irq(void)
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/*****************************************************************************
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* Orion Main IRQ
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****************************************************************************/
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static void orion_main_irq_mask(u32 irq)
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{
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orion_clrbits(MAIN_IRQ_MASK, 1 << irq);
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}
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static void orion_main_irq_unmask(u32 irq)
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{
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orion_setbits(MAIN_IRQ_MASK, 1 << irq);
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}
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static struct irq_chip orion_main_irq_chip = {
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.name = "Orion-IRQ-Main",
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.ack = orion_main_irq_mask,
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.mask = orion_main_irq_mask,
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.unmask = orion_main_irq_unmask,
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};
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static void __init orion_init_main_irq(void)
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{
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int i;
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/*
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* Mask and clear Main IRQ interrupts
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*/
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orion_write(MAIN_IRQ_MASK, 0x0);
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orion_write(MAIN_IRQ_CAUSE, 0x0);
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/*
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* Register level handler for Main IRQs
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*/
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for (i = 0; i < IRQ_ORION_GPIO_START; i++) {
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set_irq_chip(i, &orion_main_irq_chip);
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set_irq_handler(i, handle_level_irq);
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set_irq_flags(i, IRQF_VALID);
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}
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orion_irq_init(0, (void __iomem *)MAIN_IRQ_MASK);
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}
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void __init orion_init_irq(void)
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@ -2,7 +2,7 @@
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# Makefile for the linux kernel.
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#
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obj-y :=
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obj-y := irq.o
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obj-m :=
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obj-n :=
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obj- :=
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64
arch/arm/plat-orion/irq.c
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64
arch/arm/plat-orion/irq.c
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@ -0,0 +1,64 @@
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/*
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* arch/arm/plat-orion/irq.c
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*
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* Marvell Orion SoC IRQ handling.
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*
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* This file is licensed under the terms of the GNU General Public
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* License version 2. This program is licensed "as is" without any
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* warranty of any kind, whether express or implied.
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*/
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#include <linux/kernel.h>
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#include <linux/init.h>
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#include <linux/irq.h>
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#include <linux/io.h>
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#include <asm/plat-orion/irq.h>
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static void orion_irq_mask(u32 irq)
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{
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void __iomem *maskaddr = get_irq_chip_data(irq);
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u32 mask;
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mask = readl(maskaddr);
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mask &= ~(1 << (irq & 31));
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writel(mask, maskaddr);
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}
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static void orion_irq_unmask(u32 irq)
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{
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void __iomem *maskaddr = get_irq_chip_data(irq);
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u32 mask;
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mask = readl(maskaddr);
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mask |= 1 << (irq & 31);
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writel(mask, maskaddr);
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}
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static struct irq_chip orion_irq_chip = {
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.name = "orion_irq",
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.ack = orion_irq_mask,
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.mask = orion_irq_mask,
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.unmask = orion_irq_unmask,
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};
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void __init orion_irq_init(unsigned int irq_start, void __iomem *maskaddr)
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{
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unsigned int i;
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/*
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* Mask all interrupts initially.
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*/
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writel(0, maskaddr);
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/*
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* Register IRQ sources.
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*/
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for (i = 0; i < 32; i++) {
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unsigned int irq = irq_start + i;
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set_irq_chip(irq, &orion_irq_chip);
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set_irq_chip_data(irq, maskaddr);
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set_irq_handler(irq, handle_level_irq);
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set_irq_flags(irq, IRQF_VALID);
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}
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}
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17
include/asm-arm/plat-orion/irq.h
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17
include/asm-arm/plat-orion/irq.h
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/*
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* include/asm-arm/plat-orion/irq.h
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*
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* Marvell Orion SoC IRQ handling.
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*
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* This file is licensed under the terms of the GNU General Public
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* License version 2. This program is licensed "as is" without any
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* warranty of any kind, whether express or implied.
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*/
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#ifndef __ASM_PLAT_ORION_IRQ_H
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#define __ASM_PLAT_ORION_IRQ_H
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void orion_irq_init(unsigned int irq_start, void __iomem *maskaddr);
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#endif
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