Merge branch 'pwm-dmtimer-fixes' into omap-for-v5.0/fixes-v2
This commit is contained in:
commit
072167d13c
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@ -644,6 +644,17 @@ OMAP4_IOPAD(0x040, PIN_OUTPUT_PULLDOWN | MUX_MODE3)
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};
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};
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/* Configure pwm clock source for timers 8 & 9 */
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&timer8 {
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assigned-clocks = <&abe_clkctrl OMAP4_TIMER8_CLKCTRL 24>;
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assigned-clock-parents = <&sys_clkin_ck>;
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};
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&timer9 {
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assigned-clocks = <&l4_per_clkctrl OMAP4_TIMER9_CLKCTRL 24>;
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assigned-clock-parents = <&sys_clkin_ck>;
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};
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/*
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* As uart1 is wired to mdm6600 with rts and cts, we can use the cts pin for
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* uart1 wakeirq.
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@ -781,12 +781,12 @@ static const struct sysc_revision_quirk sysc_revision_quirks[] = {
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SYSC_QUIRK("smartreflex", 0, -1, 0x38, -1, 0x00000000, 0xffffffff,
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SYSC_QUIRK_LEGACY_IDLE),
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SYSC_QUIRK("timer", 0, 0, 0x10, 0x14, 0x00000015, 0xffffffff,
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SYSC_QUIRK_LEGACY_IDLE),
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0),
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/* Some timers on omap4 and later */
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SYSC_QUIRK("timer", 0, 0, 0x10, -1, 0x50002100, 0xffffffff,
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SYSC_QUIRK_LEGACY_IDLE),
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0),
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SYSC_QUIRK("timer", 0, 0, 0x10, -1, 0x4fff1301, 0xffff00ff,
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SYSC_QUIRK_LEGACY_IDLE),
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0),
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SYSC_QUIRK("uart", 0, 0x50, 0x54, 0x58, 0x00000052, 0xffffffff,
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SYSC_QUIRK_LEGACY_IDLE),
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/* Uarts on omap4 and later */
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@ -154,6 +154,10 @@ static int omap_dm_timer_of_set_source(struct omap_dm_timer *timer)
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if (IS_ERR(parent))
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return -ENODEV;
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/* Bail out if both clocks point to fck */
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if (clk_is_match(parent, timer->fclk))
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return 0;
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ret = clk_set_parent(timer->fclk, parent);
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if (ret < 0)
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pr_err("%s: failed to set parent\n", __func__);
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@ -864,7 +868,6 @@ static int omap_dm_timer_probe(struct platform_device *pdev)
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timer->pdev = pdev;
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pm_runtime_enable(dev);
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pm_runtime_irq_safe(dev);
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if (!timer->reserved) {
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ret = pm_runtime_get_sync(dev);
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