clk: fractional-divider: switch to rational best approximation
This patch converts the code to use rational best approximation algorithm which is much more precise. Suggested-by: Stephen Boyd <sboyd@codeaurora.org> Reviewed-by: Heikki Krogerus <heikki.krogerus@linux.intel.com> Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
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@ -14,6 +14,7 @@ config COMMON_CLK
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select HAVE_CLK_PREPARE
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select CLKDEV_LOOKUP
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select SRCU
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select RATIONAL
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---help---
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The common clock framework is a single definition of struct
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clk, useful across many platforms, as well as an
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@ -7,13 +7,14 @@
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*
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* Adjustable fractional divider clock implementation.
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* Output rate = (m / n) * parent_rate.
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* Uses rational best approximation algorithm.
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*/
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#include <linux/clk-provider.h>
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#include <linux/module.h>
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#include <linux/device.h>
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#include <linux/slab.h>
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#include <linux/gcd.h>
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#include <linux/rational.h>
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#define to_clk_fd(_hw) container_of(_hw, struct clk_fractional_divider, hw)
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@ -22,7 +23,8 @@ static unsigned long clk_fd_recalc_rate(struct clk_hw *hw,
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{
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struct clk_fractional_divider *fd = to_clk_fd(hw);
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unsigned long flags = 0;
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u32 val, m, n;
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unsigned long m, n;
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u32 val;
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u64 ret;
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if (fd->lock)
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@ -53,20 +55,30 @@ static long clk_fd_round_rate(struct clk_hw *hw, unsigned long rate,
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unsigned long *parent_rate)
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{
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struct clk_fractional_divider *fd = to_clk_fd(hw);
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unsigned maxn = (fd->nmask >> fd->nshift) + 1;
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unsigned div;
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unsigned long scale;
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unsigned long m, n;
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u64 ret;
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if (!rate || rate >= *parent_rate)
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return *parent_rate;
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div = gcd(*parent_rate, rate);
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/*
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* Get rate closer to *parent_rate to guarantee there is no overflow
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* for m and n. In the result it will be the nearest rate left shifted
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* by (scale - fd->nwidth) bits.
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*/
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scale = fls_long(*parent_rate / rate - 1);
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if (scale > fd->nwidth)
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rate <<= scale - fd->nwidth;
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while ((*parent_rate / div) > maxn) {
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div <<= 1;
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rate <<= 1;
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}
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rational_best_approximation(rate, *parent_rate,
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GENMASK(fd->mwidth - 1, 0), GENMASK(fd->nwidth - 1, 0),
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&m, &n);
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return rate;
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ret = (u64)*parent_rate * m;
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do_div(ret, n);
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return ret;
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}
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static int clk_fd_set_rate(struct clk_hw *hw, unsigned long rate,
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@ -74,13 +86,12 @@ static int clk_fd_set_rate(struct clk_hw *hw, unsigned long rate,
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{
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struct clk_fractional_divider *fd = to_clk_fd(hw);
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unsigned long flags = 0;
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unsigned long div;
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unsigned n, m;
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unsigned long m, n;
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u32 val;
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div = gcd(parent_rate, rate);
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m = rate / div;
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n = parent_rate / div;
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rational_best_approximation(rate, parent_rate,
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GENMASK(fd->mwidth - 1, 0), GENMASK(fd->nwidth - 1, 0),
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&m, &n);
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if (fd->lock)
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spin_lock_irqsave(fd->lock, flags);
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