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sis7019: increase reset delays

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A few boards using this controller are reported to need a little extra
time during their reset cycle.

Reported-by: Michael Goeke <michael.goeke@icachip.de>
Signed-off-by: Dave Dillow <dave@thedillows.org>
Signed-off-by: Jaroslav Kysela <perex@perex.cz>
This commit is contained in:
David Dillow 2010-06-27 00:07:57 +02:00 committed by Jaroslav Kysela
parent 3a3d5fd125
commit 08b4509889
1 changed files with 3 additions and 3 deletions
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6
sound/pci/sis7019.c
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@ -1049,7 +1049,7 @@ static int sis_chip_free(struct sis7019 *sis)
/* Reset the chip, and disable all interrputs.
*/
outl(SIS_GCR_SOFTWARE_RESET, sis->ioport + SIS_GCR);
udelay(10);
udelay(25);
outl(0, sis->ioport + SIS_GCR);
outl(0, sis->ioport + SIS_GIER);
@ -1085,7 +1085,7 @@ static int sis_chip_init(struct sis7019 *sis)
/* Reset the audio controller
*/
outl(SIS_GCR_SOFTWARE_RESET, io + SIS_GCR);
udelay(10);
udelay(25);
outl(0, io + SIS_GCR);
/* Get the AC-link semaphore, and reset the codecs
@ -1098,7 +1098,7 @@ static int sis_chip_init(struct sis7019 *sis)
return -EIO;
outl(SIS_AC97_CMD_CODEC_COLD_RESET, io + SIS_AC97_CMD);
udelay(10);
udelay(250);
count = 0xffff;
while ((inw(io + SIS_AC97_STATUS) & SIS_AC97_STATUS_BUSY) && --count)